Industry Article

Improve Signal Integrity by Reducing PCB Trace Impedance Variation

Achieving better signal integrity in a PCB design can be a challenge. Learn how PCB trace impedance variation plays a role, and how advanced tools can help smooth the way.

In the world of high speed electronics, impedance and signal integrity are inextricable. Signal integrity refers to the ability of a particular electrical signal to meet the fidelity requirements of the circuit at the receiving end. In the context of ultra fast switching, the most important signal integrity issues revolve around skew matching or setup and hold requirements.

Since electrical signals, particularly square wave switching signals, are composed of a swath of spectral content, the frequency dependent impedance of the propagating traces is paramount to maintaining integrity. 

For many common protocols, a characteristic impedance is specified by the defining standard to ensure functionality. For example, traces carrying differential switching signals for USB must provide an impedance of 90 Ω with a 15% tolerance (Figure 1).  


Impedance requirements of common communication protocols

Figure 1. Impedance requirements of common communication protocols


From the design engineer’s perspective, the fundamental question is: “What knobs can be turned to control the impedance of the traces in a design?” Without diving into a highly technical discussion of the electromagnetics surrounding impedance, the general answer to that question includes the trace cross section, the PCB material, ground plane clearances, all adjacent geometric spacing, and signal return paths.

Numerous other factors can be adjusted to affect changes in characteristic impedance, but the returns are diminished. Given these realities, designers need a tool that allows them to quickly estimate the impedance of the traces during layout so that adjustments can be made before the design wanders too far off the path to success.


Signal Integrity Extension

Viewing impedance variation among the traces of a PCB during the layout phase in real time is a difficult challenge, and most design tools don't provide such details in an integrated package.  Autodesk recently partnered with Ansys to develop a third-party extension (Figure 2) for Fusion 360 to add exactly this functionality.  


A view of the third-party signal integrity extension

Figure 2. A view of the third-party signal integrity extension


This signal integrity extension uses a method of moments solver to analyze the PCB traces considering all of the relevant parameters discussed previously. It provides four main features: impedance matching, signal insight, on-demand analysis, and visual violation flagging.  

Impedance matching introduces a color-coded overlay to depict the impedance values specified traces along with the effect of changes to trace width, dielectric constant, and layer thickness (Figure 3). The signal insight tool allows users to inspect the electrical properties of high-speed lines, such as time delay, trace length, capacitance, resistance, and inductance values. 

On-demand analysis incorporates target parameters such as frequency and tolerance to quickly analyze signals of interest for their compliance. Finally, visual violation flagging provides a color-coded overlay on the 2D PCB design to reveal impedance or coupling issues at a glance.


Electromagnetic field lines used to determine trace impedance 

Figure 3. Electromagnetic field lines used to determine trace impedance 


High Speed Design in Fusion 360

When designing a PCB in Fusion 360, you can simply click on the signal integrity button to launch the extension workspace. Considering all of the parameters relevant to the design, such as PCB materials, stackup configuration, trace cross section, component spacing, and the like, a particular trace can be simulated and analyzed for its impedance characteristics. The designer must provide a frequency of interest and an optional target impedance and tolerance.

After clicking the analyze button, the trace will be color coded to quickly provide insight into possible issues with signal integrity. Figure 4 is an example shown below for a differential pair being routed for connecting a USB IC to an external connector.

The signal integrity extension immediately identifies an area where the impedance is well out of bounds for proper USB operation. It is quite clear that the reason is a keep-out area in an underlying ground plane. By removing this keep-out, the impedance in that area is restored to the nominal value, and the designer can quickly see that the traces meet the required specification.


Effect of ground plane keep-out on USB trace impedance

Figure 4. Effect of ground plane keep-out on USB trace impedance


To take this example a step further, a target impedance and tolerance can be entered into the analysis simulator, which is shown in Figure 5. This will color code the trace along its length to depict areas of concern. Trace width and spacing, nearby components, copper pours, and the like can be adjusted to bring the trace back within specification.  


Target impedance and tolerance analysis for a particular trace

Figure 5. Target impedance and tolerance analysis for a particular trace


In addition to characteristic impedance analysis, the signal integrity extension can perform equivalent circuit modeling of a particular trace or differential pair. The extracted model includes distributed parameters for resistance, capacitance, and inductance, as shown in Figure 6 below.


Equivalent circuit extraction of a particular trace geometry

Figure 6. Equivalent circuit extraction of a particular trace geometry


Signal integrity can be simulated to see the actual effect of the trace layout on the waveform using this equivalent circuit model. Figure 7 is an example shown below for a USB differential square wave where the effect on delay, rise and fall times, and overshoot can be quantified.


Signal waveforms simulated with extracted equivalent circuit model

Figure 7. Signal waveforms simulated with extracted equivalent circuit model


Smoothing the Signal Integrity Path

Signal integrity has always been of primary concern in high speed PCB design. In the past, a complex suite of expensive and highly specialized tools was required to perform any useful analysis. Exporting physical geometry from layouts, running 3D electromagnetic solvers, and then feeding the solutions back into actionable design practices required significant time and expertise.

The Fusion 360 signal integrity extension bundles all of this functionality into an easy-to-use and intuitive workspace, integrated directly into the layout environment. The included tools allows a designer to estimate trace impedance quickly, visualize the effects of layout changes, and generate accurate waveform simulations with only a handful of clicks.

Under the hood, complex solvers optimized for speed are performing all of the previously disparate steps in near real time. As a result, designer engineers avoid the black magic of electromagnetic simulation while gaining an intimate understanding of their layout, delivering a successful PCB under budget and ahead of schedule. More information is available at the Fusion 360 Signal Integrity Extension product page.


All images used courtesy of Autodesk

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