MicroBlaze is a 32-bit soft RISC processor core, created to accelerate the development of cost-sensitive, high-volume applications that traditionally required one or more microcontrollers.

MicroBlaze on Xilinx's Cost-Optimized Portfolio FPGAs offers advances in tool suite and FPGA platform to help simplify development effort and minimize system budgets. Xilinx has focused on improving the usability of the MicroBlaze processor softcore, enabling engineers to rapidly configure an embedded hardware platform and immediately start software coding in an industry standard environment.

As an embedded processor, MicroBlaze enables Xilinx's FPGA portfolio to meet the integration and performance requirements of industrial, communications infrastructure, medical device, automotive, and consumer markets. With the right combination of platform and processor, designers can gear a solution to meet their architectural challenges that incorporate the right combination of I/O peripherals, communications interfaces, real-time capability, and operating system support.

 

MicroBlaze core architecture

Figure 1. MicroBlaze core architecture

 

How is MicroBlaze Different?

Traditionally, implementing a processor softcore like MicroBlaze in an FPGA for maximum integration advantage meant considerable time. Accelerated time to market means intense pressure to get software development immediately underway and the last thing needed is the additional learning curve and design overhead of the microcontroller platform before coding starts. This issue was addressed by introducing a development flow that allows coding to start immediately without having to wait for a customized hardware platform.

These updates are available to try with an array of development kits for the cost-optimized FPGA families, including example projects to build upon. If you need specific functionality integrated with MicroBlaze, such as transceivers, interfaces, or DSP algorithms, a portfolio of ‘drag and drop’ IP is available and accessible through the toolchain that can integrate with MicroBlaze. In most cases, IP providers have example projects and tutorials that guide you through implementation and with trial periods or tethered options enable designers to prototype immediately. Xilinx tools offer a free web available version that supports most development boards.

This is different from past FPGAs where you had to port your own version of an open-source O.S or create your own kernel to run code. When Linux versions existed, they were commonly buggy and difficult to implement with time wasted on wikis and inconsistent or insufficient build instructions. Today MicroBlaze offers operating system support with options including freeRTOS and Linux.

These come with real-world example projects modifiable as need suits – a considerable advance over the limited O.S support of the past. It is now possible to choose efficient real-time operating systems that feature reliable determinism or a mainline kernel accepted Linux environment, also available as pre-built ram-disks. It is surprisingly easy to 'knock-up' a Linux implementation, hook it up to a network interface, and have a simple web server going.

 

MicroBlaze example running the real-time operating system 'FreeRTOS'

Figure 2. MicroBlaze example running the real-time operating system 'FreeRTOS'

 

A good architecture must enable new feature introduction, future-proof the design with reduced hardware platform iterations, and incorporate design security. MicroBlaze is a full-featured microprocessor architecture incorporating those and many additional features. These features include virtual memory management, cache coherency, streaming link support, and a floating-point processing unit.

The needs of factoring in highflying applications with fault-tolerant configuration options have also been applied. Those same fault-tolerant options help to provide tamper-proofing capabilities for security sensitive applications. Two or more 'parallel' MicroBlaze cores invisibly lockstep monitors the running processor and detects single event upset or hacking attacks, enabling the system to self-diagnose and respond to otherwise catastrophic situations.

 

Example of a Lockstep MicroBlaze fault-tolerant architecture

Figure 3. Example of a Lockstep MicroBlaze fault-tolerant architecture

 

Softcore Implementation

Xilinx's Cost-Optimized Portfolio has a number of other advances to help improve softcore implementation. High-speed SPI configuration enables faster boot options for program code resident in serial flash with multi-boot capability to enable multiprocessor application support. Dynamic, in-field upgrade is possible through in-built safe-update capability, which includes 256-bit AES encryption and HMAC/SHA-256 authentication.

Xilinx supports FPGA firmware updates via a partial reconfiguration capability. This enables dynamic modification of logic on the FPGA by downloading partial bit files while the remaining logic continues to operate without interruption. Rather than using multiple devices or requiring taking the FPGA offline for update, designs can feature continual operation without the need for additional devices.

Historically, FPGA softcore integration benefits came with increased design complexity and the price tag of developing custom bridging logic, peripheral development, and ongoing inefficiency as designers were forced to write and debug code in a sub-standard environment. MicroBlaze features all the peripherals in traditional embedded microcontrollers that are easily integrated with the softcore.

The Eclipse-based toolchain is a comprehensive, familiar environment that offers full mixed level debugging and also supports multiprocessor development. Software designers can switch between ARM or Microblaze compilation and debugging support within the same development environment. Automatic board support package creation provides access to the Microblaze hardware architecture's memory map, including peripherals and I/O. The BSP links in peripheral drivers and includes an automake facility, enabling design to proceed with minimum overheads.

Select an optimum FPGA platform and then open one of three pre-configured MicroBlaze architectures with the SDK and follow the instructions located in the quick start guide (PDF). Software designers can be up and running with “hello world” in around five minutes. This enables engineers to gain familiarity with Microblaze and commence implementation without the need to use the Vivado FPGA tool suite. If more special-purpose customization is required, the template project can be adapted with Vivado's IP Integrator tool. This tool incorporates connection and block automation configuration wizards and offers a straightforward method of adding additional IP, modifying interface peripherals, bus connections, and memory mapping.

 

Quickly add peripherals with the Vivado IP Integrator Tool

Figure 4. Quickly add peripherals with the Vivado IP Integrator Tool

 

The Cost-Optimized FPGA Portfolio

The cost-optimized FPGA Spartan-6, Spartan-7, Artix-7, and Zynq-7000 families offer features and functionality tailored to meet the needs of a diverse set of target applications. Although they all have the ability to implement hardware algorithms and microprocessor-based control systems, their differences reflect target-application-specific requirements that are impractical to cost-effectively obtain with generic logic alone.

 

Xilinx Cost-Optimized Portfolio overview

Figure 5. Xilinx Cost-Optimized Portfolio overview

 

Spartan-6 and Spartan-7

Spartan-6 and Spartan-7 FPGA platforms are intended for any-to-any connectivity, bridging applications, and sensor interfacing. With that said, they are still powerful enough for high-performance algorithms while still offering the highest I/O connectivity platforms available today. They enable shrunken four-layer PCB designs due to their small form-factor packaging options.

Spartan-7's performance reduces power supply size and cost, leading to cost and size improvements. A number of built-in system-level blocks including DSP slices, PLLs, dual 12-bit 1MHz ADCs, and a system monitoring tile enable functionality to be mapped into the FPGA for additional savings. Other features include high-speed DDR3 interface capability and a vast number of readily available IP blocks, connectable to industry-standard AMBA AXI-4 buses. Automotive-grade versions are available for applications that require higher temperature tolerance, and architects can secure their designs through enhanced IP security with AES and Device DNA protection.

 

Artix-7

Artix-7 is available for designs that require high-speed serial interfaces or a signal-processing heavy application. The 6.6Gbps capable transceivers are currently the fastest available in the industry. This speed enables interfaces such as PCI Express, DisplayPort, Serial ATA, HDMI, USB3.0, and UHD-capable SDI to be integrated with a MicroBlaze system.

 

Zynq-7000

The Zynq-7000 is a SoC that features a single or dual core ARM-Cortex-A9 subsystem with over 3000 high-speed interconnects to the FPGA fabric for high-speed algorithm acceleration. To get higher speeds, designers can use the Zynq UltraScale+ MPSoC dual and quad-core A53. Xilinx offers system and IP-centric design, integrating plug and play IP at an interface level, rather than the signal level of IP building blocks. The design ecosystem supports high-level synthesis with C/C++, system-C open-CL to make acceleration easier for software developers through Eclipse.

 

MicroBlaze Integration

MicroBlaze integrates into Xilinx’s configurable logic analyzer, Chipscope Pro software. This allows hardware interfaces, including serial and parallel buses, general purpose I/O, and any logic interconnection to be directly cycle-by-cycle captured and traced along with the microprocessor operation. Physical configuration, programming, and debug interfaces are available to connect high-level software debugging to the MicroBlaze system to enable all the familiar breakpoint and stepping facilities required.

Xilinx provides USB 2 download cables for CPLD and FPGA development kits as well as JTAG cables for direct connection to the devices themselves if required. If remote debugging is a requirement, it’s possible to connect to a LAN via a hub or switch through an independently powered Ethernet to JTAG cable. If other options are required, or there is a need to be compatible with existing toolchains, debugging solutions are available from third-party providers.

MicroBlaze works both as the main processor or as a coprocessor for the ARM subsystem enabling real-time algorithm acceleration and critical function segregation. New features add reliably by enabling real-time improvements through hardware design changes including the addition of more MicroBlaze processors. Upgrades can be accomplished with high security, both software and FPGA logic images upgradable during uninterrupted operation. Low-cost integrated ARM solutions add application space and IoT capabilities to an FPGA that can incorporate as many MicroBlaze coprocessors as required for real-time algorithm support.

Xilinx's OpenCL C-to-VHDL capability enables invisible in-line hardware acceleration of software designs. Combining MicroBlaze with the Cost-Optimized Portfolio provides a scalable future-proofed architecture that has a unified toolchain which utilizes a comprehensive IP catalog.

 

Additional Resources

 


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