Superscalar Version Of DLX Processor

Details
Category: Arithmetic Core
Created: December 27, 2011
Updated: January 27, 2020
Language: VHDL
Other project properties
Development Status: Planning
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
The DLX processor is an academic processor described in in John L. Hennessy and David A. Patterson's Computer Architecture: A Quantitative Approach. Our project aims to offer a decent structural VHDL description of the processor. Moreover, advanced computer architecture features, power management, debug unit, memory management unit and OCP will be added to the project. The final goal of the project is to provide a multi-processor system-on-chip which can support VLSI research or simple embedded application.