UART 8 SystemC Implementation

Details

Category: Communication Controller

Created: January 18, 2016

Updated: January 27, 2020

Language: Other

Other project properties

Development Status: Beta

Additional info: Design done, FPGA proven

WishBone compliant: No

WishBone version: n/a

License: Others

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Description

This is a simple UART implementation with intention to valid ASIC learning and use it on simple applications. The environment was rebuild with graphical interface to who see test by yourself. For more information access our link bellow on GITHUB.

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