UDP/IPv4 for 10G Ethernet

UDP/IPv4 for 10G Ethernet


Category: Communication Controller

Created: May 12, 2017

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Stable

Additional info: FPGA proven

WishBone compliant: No

WishBone version: n/a

License: LGPL


The UDP/IPv4 for 10 G Ethernet IP core, implements mandatory parts of UDP, IPv4 and Ethernet (MAC) protocols. It is minimal implementation of complete RFC compliant UDP/IP stack.

It doesn’t implement supporting protocols as Address Resolution Protocol (ARP – translating IP addresses to MAC addresses), Dynamic Host Configuration Protocol (DHCP – often use to assign IP addresses dynamically) or Internet Control Message Protocol (ICMP – services like ping). Services that are commonly provided by these protocols must be replaced by user defined mechanisms.

The main field for deployment of this core are high-speed data transfer applications mainly in controlled environment of local networks or simple peer-to-peer connections, but it is not limited to it.

The core is aimed to be used for 10 G Ethernet in both optic and metallic version (64bit XGMII internal interface). It is also ready to be used with PHYs that support up to six speeds – 10 Gbps, 5 Gbps, 2.5 Gbps, 1 Gbps, 100 Mbps, 10 Mbps.

The core was released as part of Xenie FPGA module project. Xenie module is a HW platform equipped with six speed metallic 10GBASE-T Ethernet PHY that can be used for optical 10 G Ethernet too. Example design demonstrating usage of this UDP/IPv4 core can be found under Xenie project.