Flexible and Generic FIR Filter on FPGA
Details
Category: DSP Core
Created: September 10, 2013
Updated: January 27, 2020
Language: VHDL
Other project properties
Development Status: Beta
Additional info: FPGA proven
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
This FIR filter is very generic and flexible. It has been tested working on an FPGA, though the existing version does not yet have a Wishbone control interface. I will be adding one to it soon. Stay tuned!
The impulse response curves for both theoretical calculations (Sage Math and ModelSim / Questa) vs. hardware acquisition results correlate well against each other. 
