Scratch DDR SDRAM Controller VHDL

Scratch DDR SDRAM Controller VHDL


Category: Memory Core

Created: September 11, 2009

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Beta

WishBone compliant: No

WishBone version: n/a

License: LGPL


DDR SDRAM controller core targeted at the mt46v32m16 chip on the Spartan3e Starter Board. The testbench synthesizes and runs on the targeted hardware. Additionally I've integrated this controller core into an SoC design consisting of a T80 soft cpu with a VGA controller, Flash controller and UART.

The design is more or less frozen, unless I change out soft CPUs and need to integrate again. Further changes will be driven by bug discoveries/reports.