KISS Board with MOTHER Board and FPGA Xilinx/Altera

Details
Category: Prototype Board
Created: May 28, 2006
Updated: January 27, 2020
Language: Verilog
Other project properties
Development Status: Stable
Additional info: Design done, FPGA proven, Specification done
WishBone compliant: Yes
WishBone version: n/a
License: n/a
Description
,
[Keep It Simple,Stupid] Board. The board was evaluated like [or1k/orp project]. BOARD consists of two pieces. One is FPGA board. Another is MOTHER board. The device on the FPGA board is ANY(xilinx or altera ...). Only connected specification of the board is important.
Board snapshots
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- MOTHER board
Status
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- Assembly
- It's planning(more cheap!)
- It's finished(commit code,RTL8019AS Evaluation is done)
- It's finished(commit code,checkout-test is done)
- It's finished(commit code,checkout-test is done)
Evaluation
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- Benchmark
- Program Outline
- Draw1Test:Normal render(Read,Write) - Draw2Test:RGB565->YUV,Y:modulation,YUV->RGB565(Read,Calculation,Write) - EraseTest:Clear VRAM(Write)
- Program Outline
- Sytem Condition
- Case 1:CPU=25MHz,WB=25MHz,EXT_MEM=50MHz - Case 2:CPU=30MHz,WB=30MHz,EXT_MEM=50MHz - Case 3:CPU=25MHz,WB=25MHz,EXT_MEM=60MHz
- OR1200 Condition
- Case A:IC=no-used,DC=no-used - Case B:IC=4KByte ,DC=no-used - Case C:IC=no-used,DC=4KByte - Case D:IC=4KByte ,DC=4KByte
- ,
- MISC condition
- VramRenderRoutine on EXT_FLASH[.text section](include Cache) - InterruptsHandler on QMEM[.icm section] - ImageDataSize(40x50pixel) is 4000byte(include Cache) - The byte_order of QMEM is enable.
- ,Demonstration,
,- phots
- Results
TODO
,- Reduce cost - This is Expensive or Cheap? - How to do?(thinking) - The examination point is put out. - How is the Debug-Interface-pin? - This WEB page is maintained - Add Board electrical information - Add Teaching material information
Design
,- Hardware
- PCB Architecture
- SOC Architecture
- Functions
- Sections
Section Usage .reset InstractionCode at Start .vectors InstractionCode at Exception .text InstractionCode(normal) .icm InstractionCode(early) .data DataCode(initialization) .bss DataCode(no-initialization) .extdata ExtendDataCode(initialization) .extbss ExtendDataCode(no-initialization) .stack StackArea
- Memory
Device Address Usage InternalSRAM0 0x00000000 Exception InternalSRAM1 0x01000000 NotImpliment ExternalSDRAM0 0x02000000 --- ExternalSDRAM1 0x03000000 VRAM ExternalFlash 0x04000000 BIOS
- Interrupts
Core Location Exception Interface TickTimer OpenRisc1000(OR1200) 0x500 Internal UART16550 SOC-Peripheral 0x800 MemoryMapIO WB_DMA SOC-Peripheral 0x800 MemoryMapIO
Assembly
,- Manual
- You can get the hardware-manual.I did upload it here.
More information- If you have a question,you can contact us,please refer to following web-page. Tessera WebSite(Japanese) Tessera WebSite(English)
Simulation
,- CrossCompiler Environment
- Source binutils-2.16.1.tar.gz
>wget ftp.gnu.org/gnu/binutils/binutils-2.16.1.tar.gz >gzip -dc binutils-2.16.1.tar.gz | tar xvf -
- Patch to binutils-2.16.1
>wget www.opencores.org/cvsget.cgi/or1k/binutils/binutils-2.16.1/binutils-2.16.1-unified.diff.bz2?do_download=now >bzip2 -d binutils-2.16.1-unified.diff.bz2 >cd binutils-2.16.1 >patch -p1 < ../binutils-2.16.1-unified.diff >cd ..
- Build CrossCompiler
>mkdir binutils_build >cd binutils_build >../binutils-2.16.1/configure --target=or32-uclinux --prefix=/opt1/or32-uclinux >make all >make install >cd ..
- bmp2c(SmallProgram)
Description:Convert bmp-file to c-file. InputFile :BMP(only24bitBGR,RGB888) OutputFile :C(RGB565) WorkingDir :./kiss-board/kiss-board_soc/sw/bmp2c >cd ./kiss-board/kiss-board_soc/sw/bmp2c >make
- utils(SmallProgram)
Description:Convert boot-rom,etc WorkingDir :./kiss-board/kiss-board_soc/sw/utils >cd ./kiss-board/kiss-board_soc/sw/utils >make
- boot_uart
Description:Example1 to compile,execute object from uart WorkingDir :./kiss-board/kiss-board_soc/sw/boot_uart >cd ./kiss-board/kiss-board_soc/sw/utils >make
- boot_flash
Description:Example2 to compile,boot from rom WorkingDir :./kiss-board/kiss-board_soc/sw/boot_flash >cd ./kiss-board/kiss-board_soc/sw/boot_flash >make
- pan
Description:VerilogPLI($pan=>like a popen()) WorkingDir :./kiss-board/kiss-board_soc/sim/c/pan >cd ./kiss-board/kiss-board_soc/sim/c/pan >make
- hex2ver
Description:IntelHEXtoVerilog(PLI?) WorkingDir :./kiss-board/kiss-board_soc/sim/c/pan >cd ./kiss-board/kiss-board_soc/sim/c/convert_hex2ver >make -f Makefile.cygwin.modeltech >make -f Makefile.linux.modeltech >make -f Makefile.linux.ncverilog
- ram
Description:GTK application,VRAMScreen WorkingDir :>./kiss-board/kiss-board_soc/sim/c/ram >cd ./kiss-board/kiss-board_soc/sim/c/ram >make
- Source binutils-2.16.1.tar.gz