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Details
Category: System on Chip
Created: Mar 29, 2011
Updated: Jan 27, 2020
Language: Verilog
Other project properties
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
Generic APB register file generator. Creates Verilog source, C header file and HTML documentation, from an Excel worksheet. The source files are written in RobustVerilog, a free RobustVerilog parser can be downloaded from http://www.provartec.comedatools
Related projects
Generic APB master stub
http://opencores.orgproject,apb_mstr
Generic AXI2APB bridge
http://opencores.orgproject,robust_axi2apb
