MD5 Hash Core RFC 1321
Thihs core fully implements the MD5 (Message Digest Algorithm RFC 1321). The core can be used for data authentication in digital broadband, wireless or multimedia system. The MD5 core processes the input message in 512-bit blocks and produce message digest of 128-bit (for md5). The output data is referred to as a “digital signature” or “fingerprint” or “message digest” of input messages.
The core also pads the data if the input data is not multiple congruent of 448 bits. This makes the usage very simple and no extra hardware is needed to support MD5 padding. The core also allows to load initialization vector using InitVec valid signal and this can be used to implement HMAC like function.
- Supports MD5 Secure Hash Algorithm described in RFC 1321.
- High speed operation. One clock per hash step. Full MD5 is computed in 64+1 cycles.
- Supports message padding
- Allows Time Division Multiplexing (TDM) of several data streams.
- Simple external interface
- Simple 32 bit I/O interface
- Outputs message digest from every input block of data (512-bit block size)
- Supports user input initialization vectors.
- Minimal gate count.
- Support 1.6 Gb/s of data rate for MD5 at 200 MHz.
- Available in ASIC and FPGA Technologies.