Or try an example search: SD Card Controller
This application parses a Verilog define file and presents a GUI to the user
Description of project.. Features - feature1 - feature1.1 -feature1.2 -feature2
A platform for execute simple games, with graphics in two dimensions, implemented on Altera DE2-115 development board. • Compatible with Sega…
The Advanced Debug Interface is a suite of IP cores and software programs designed to allow a developer to download code to a target CPU in a…
About this core This is a collection of commonly used base functions, used in all of ASTRONs other cores. These source files can work in any…
Status I just started reading the Ogg Vorbis spec. and I'm seeing if other people are interested.
a VHDL version of the Intel 8254 timer. Note: uses a synchronous (Wishbone) processor interface, rather than an asynchronous of the Intel 8254.…
Controller for 16 character - 2 line LCD displays as used on various Xilinx evaluation boards. Features - 4-bit LCD data interface - One…
Public domain code of the 2nd order Sigma-Delta DAC. Allows to produce reasonable quality audio signal from single digital ouput pin in the FPGA.…
AlternaScope provides a cheap alternative to expensive oscilloscopes; Using a VGA display and a simple mouse interface, a user can use this scope…
VHDL implementation of the 6532 RIOT (RAM-I/O-TIMER) Like the original chip from Mostek/Rockwell, this component is 6500/6800 bus compatible. The…
The Artificial Intelligence System is a neuromorphic FPGA/ASIC project undertaken by a number of volunteers with the scope of simulating real-time…
Usage and Operation In order to operate the circuit correctly it must first be reset (asynchronously). Below is a timing diagram that illustrates…
This module is software compatible with the PSG (Programmable Sound Generator) AY-3-8910. It can be used to produce music.
AVALON/WISHBONE Bridge This is an Avalon to WishBone Bridge. Avalon is a bus standard mainly used in Altera(Now Intel) Tools. Wishbone as every one…
Simple backtracking 9x9 Sudoku solver written in Verilog. Uses an exact cover algorithm to quickly find a solution with minimal backtracking (C…
This is for the final project of EC551 Advanced Digital Design using Verilog, a course offered in Boston University. It's basically the classic…
Uses the shift register technology to create a big counter, that gives out a pulse at the period specified as a generic Features Designed for…
This project is a collection of small designs involved with clock boundaries. The clock_switch designs are based on an eetimes article. The…
The Computer Operating Properly Module, COP, is a watchdog timer module that triggers a system reset if it is not regularly serviced by writing two…
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