BigCounter for Xilinx FGPA
Details
Category: Uncategorized
Created: December 20, 2007
Updated: January 27, 2020
Language: VHDL
Other project properties
Development Status: Beta
WishBone compliant: No
WishBone version: n/a
License: GPL
Description
Uses the shift register technology to create a big counter, that gives out a pulse at the period specified as a generic
Features
Designed for Xilinx FPGA's, with SRL's.
An efficient way of generating a divide by n**16 counter, where N can be very big.
Status
basic counter in cvs
