uTosNet Framework - Utilize dual-port BlockRam in the FPGA
The uTosNet framework aims at providing a very fast method for interfacing physical components, such as motor drivers, ADCs, encoders, and similar, to applications on a PC.
The framework is based on the Node-on-Chip architecture (link to paper coming).
It works by utilizing a dual-port BlockRam in the FPGA, with one port exposed to access from the PC (through uTosNet) and the other port exposed to access from user-defined modules. This allows easy and generic storage of process variables.
Currently two versions of uTosNet are supported:
- PC side USB converter chip UART FPGA
- PC side Ethernet Digi Connect ME 9210 microcontroller module SPI FPGA
Currently available on SVN
Currently, the following files are available for download from the project SVN server:
- uTosNet userguide
- Embedix Spartan3AN-50 documentation
- FPGA-side code for uTosNet (except the uart functionality itself)
- USB/RS232 example
- Ethernet/SPI example
- uTosNet UART controller example
- PCB design files for a very simple FPGA board based on the Spartan3 50AN, and an add-on board with extra connectors, leds, the USB/UART converter chip and the Digi Connect ME 9210 module.
- A simple commandline application for use with the Ethernet/SPI version (a simple terminal emulation program, such as PuTTY or HyperTerminal, can be used with the USB/UART version)
- C++ source code for the Ethernet version, for use with the Digi ME 9210