16x2 LCD controller for Xilinx
Details
Category: Uncategorized
Created: July 29, 2012
Updated: January 27, 2020
Language: VHDL
Other project properties
Development Status: Stable
Additional info: Design done, FPGA proven
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
Controller for 16 character - 2 line LCD displays as used on various Xilinx evaluation boards.
Features
- 4-bit LCD data interface
- One 128bit-wide std_logic_vector input for each diplay line (16x8bit=128). Everything you send to those inputs goes directly to the display.
Synthesis
- Tested on Xilinx ML501 and ML507
- Virtex5: 37 flip flops, 228 LUTs, >300MHz
