Simple Programmable Interrupt Controller
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Details
Category: Uncategorized
Created: December 02, 2002
Updated: November 19, 2019
Language: Verilog
Other project properties
Development Status: Stable
Additional info: FPGA proven
WishBone compliant: Yes
WishBone version: n/a
License: n/a
Description
Simple programmable interrupt controller. It supports up to 8 interrupt sources. Polarity and sensitivity (either edge or level) is programmable per interrupt source. The core features an 8bit wishbone interface. Wider wishbone interfaces are easily supported by using multiple instances.
Very simple, very small.
Features
- Up to 8 interrupt sources
- Sensitivity (edge/level) programmable per interrupt source
- Polarity programmable per source
- Static synchronous design
- Fully synthesisable
- 48 LUTs in a Spartan-II, 83 LCELLs in an ACEX
Status
Design is finished and available in Verilog from OpenCores CVS.
