Simple Traffic Light Controller for Modelmaking Purposes

Simple Traffic Light Controller for Modelmaking Purposes

Details

Category: Uncategorized

Created: June 17, 2008

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Stable

Additional info: FPGA proven

WishBone compliant: No

WishBone version: n/a

License: LGPL

Description

The goal of this project is to provide a simple traffic light controller for different transport modeling purposes like model railways.
I repeat "modeling purposes", don't even think about using it in real-world applications 😊
 

Features

- Very simple, stand-alone Traffic Light Controller
- Through generics parameterizable light timing lengths
- Testbench written in VHDL.
- Makefile for synthesis with XST (Xilinx) and simulation with Modelsim (Mentor Graphics).

Status

The main phase of the project is already finished, but a lot of additional features still need to be added.
- The fixed time control mechanism could be extended with a sensor based dynamic control.
- A parameterizable interface for modeling different kinds of road intersections would be a nice feature.
- Specifications are still needed!