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The Benefits and Challenges of a GaN-Based, Quasi-Resonant Power Converter

August 13, 2020 by Steve Arar

A recently-released reference design for a GaN-based QR adaptor opens a discussion: How do quasi-resonant flyback converters work? And what are the virtues and limitations of designing a GaN-based power converter?

GaN Systems, which offers a range of gallium nitride (GaN) high-power switching diodes and transistors, has recently announced a reference design for a high power density, 65 W quasi-resonant charger. The reference design is based on GaN devices and is targeted for the consumer electronics market, including mobile phone and laptop computer applications.

Because GaN devices feature extremely high switching speed, low on-resistance, and zero reverse recovery, they produce smaller and more energy-efficient solutions. The new design offers a power density of 18.5 W/in3 and a peak efficiency of 93.6%, according to the condensed version of the reference design.

In this article, we’ll take a look at the basic operation of a quasi-resonant flyback converter. We’ll also briefly discuss a few of the challenges we face when designing a GaN-based power converter.   

 

Flyback Converter

The following diagram shows the basic structure of a flyback converter. 

 

Flyback converter

Flyback converter. Image (modified) courtesy of Texas Instruments

 

One mode of operation for this circuit is called discontinuous conduction mode (DCM) with the typical waveforms depicted below. 

 

Flyback converter waveforms in DCM

Flyback converter waveforms in DCM. Image courtesy of Texas Instruments

 

During the time interval from t0 to t1, the switch is on and a current with constant slope flows from the input voltage source through the primary winding to ground. The drain current ID ramps up until a desired current level is reached, at which point a controller turns off the switch.

During this interval, the voltage that appears across the secondary winding puts the diode in reverse bias because the dot-end of secondary is at a higher voltage compared to the other end. Hence, no current can flow through the secondary. As the primary current ramps up, energy gets stored in the core of the coupled inductor. 

During t1 to t2, the switch is turned off and the energy stored in the core is delivered to the secondary winding. Note that in this interval, the dot-end of the secondary winding is at a lower voltage compared to the other end, and the diode is conducting.

The secondary current decays linearly. With DCM, this time interval of operation is sufficiently long to let the secondary current decay down back to zero. In DCM, there is an “idle period” where both the primary and secondary currents are zero. After this idle period, the switch turns on again to trigger a new cycle of power conversion.  

 

Ringing on the Drain-Source Voltage

The above diagram also depicts the drain-source voltage of the transistor. From t0 to t1, the switch is on and VDS=0. When the diode at the secondary conducts, the voltage across the primary should be the input voltage (Vi) plus the output voltage reflected to the primary side:

 

$$\simeq\frac{V_o}{n_2}$$

 

However, as shown above, there is ringing on the drain voltage before it settles to the following:

 

$$V_i + \frac{V_o}{n_2}$$

 

The leakage inductance of primary along with the parasitic capacitance of drain lead to high-frequency oscillations just after the switch turns off. These spikes are usually limited by a clamp circuit to reduce the voltage stress over the transistor. 

 

The VDS waveforms of a DCM flyback converter.

The VDS waveforms of a DCM flyback converter. Image (modified) courtesy of Infineon
 

The drain voltage exhibits another oscillatory behavior with lower frequency during the idle period. In this interval, the drain-source voltage should drop to the input voltage (Vi) because the secondary current has declined to zero. However, the drain capacitance resonates with the magnetizing inductance of the primary winding, which leads to some ringing before the drain voltage can settle to Vi. 

 

Quasi-Resonant Flyback Converter

With a flyback converter operating in DCM, the transistor drain-source voltage experiences large fluctuations in the idle period. As a result, the switch turn-on power loss depends on when it is turned on.

A quasi-resonant flyback converter takes advantage of this feature. It attempts to minimize the switch turn-on loss by employing a controller that turns on the switch when the drain voltage reaches a valley.

 

Challenges of GaN-Based Power Conversion

Just like an n-channel MOSFET, an enhancement-mode GaN device is turned on by applying a gate drive voltage greater than the gate-source threshold voltage (VTH). However, the gate-to-source voltage levels of a GaN device are lower than that of a MOSFET.

This can impose several challenges for designing a GaN-based power converter. A thorough discussion of the pros and cons of using GaN devices is beyond the scope of this article; however, we’ll briefly look at some challenges imposed by the fact that a GaN device has lower gate-source voltage levels.

With a GaN device, the gate drive voltage of a fully enhanced device is very close to the gate-source breakdown voltage. The margin is about 1 V. For example, with GaN Systems' GS-065-011-1-L, the device’s fully-enhanced gate-drive voltage is 6 V while the maximum gate-to-source voltage is 7 V. Hence, the gate driver of a GaN device should be able to avoid voltage spikes and parasitic ringing. 

Besides, a GaN device has a relatively lower gate-source threshold voltage compared to a MOSFET. This reduces noise margins. For example, a lower gate-source threshold voltage can make the device susceptible to a positive-going dV/dt across the drain-source voltage as illustrated below.

 

A GaN device's parasitic capacitances and currents

A GaN device's parasitic capacitances and currents. Image courtesy of Texas Instruments
 

If the current induced by a dV/dt event raises the gate voltage above VTH, the device will inadvertently turn on. Choosing a device with a Miller charge ratio (QGD/QGS) of less than 1 can guarantee dV/dt immunity. If this is not possible, the gate-driving circuit should be designed to reduce the portion of the induced current that goes through the CGS

Another disadvantage of a GaN device is that it can have a relatively higher gate leakage current that can consequently increase the gate driver power dissipation.

Despite all these challenges imposed by lower gate-source voltage levels, GaN devices have the significant advantage of switching at much faster speeds compared to silicon super-junction MOSFETs. Switching capability is usually specified by the gate charge parameter. The following table compares important parameters of a GaN device with three typical MOSFETs. 

 

A side-by-side comparison of important parameters of a GaN device with three typical MOSFETs

A side-by-side comparison of important parameters of a GaN device with three silicon MOSFETs. Image courtesy of GaN Systems

 

Featured image (modified) used courtesy of GaN Systems

 


 

Do you have experience with GaN-based power conversion? Tell us about it in the comments below.