Figures of Merit in Power Design: A Reliable Benchmark or an Evolving Standard?December 04, 2020 by Antonio Anzaldua Jr.
Design teams, especially in the power sector, may be increasingly asked to benchmark performance with Figures of Merit. What is this standard and how might it be evolving alongside component innovation?
Power electronics is a constantly evolving field and as such, standardization protocols can't always keep up with innovation. When designers are tasks with creating a new line of power devices, for example, many must instead create their own data-based metrics for performance—relative to its alternatives.
One method to establish such in-house metrics is known as Figures of Merit (FoM), which Altium calls "a way to score your opinions."
Establishing Figures of Merit (FoM)
When designers are tasked with aligning a new device's specs with market expectations, a FoM method can help them reconcile both worlds.
Conceptual flowchart of how to determine FoM. Image used courtesy of Altium
A design team begins with an idea that is considered a measured opinion. The team then compares this measured opinion with data received from customer surveys to see if the device idea meets the market needs. Then, the team will generate ideas and gradually form groups to prioritize which groups are easy to manufacture and which are near impossible with current technology.
FoM has become somewhat of a standard for manufacturing power devices, though this standard often looks different for different semiconductor structures.
Johnson, Keyes, Baliga, and Baliga High-Frequency FoMs
There are several popular FoM that have been developed for SiC and other power semiconductors over the years. Some of these include the Johnson FoM, the Keyes FoM, the Baliga FoM, and the Baliga high-frequency FoM.
- The Johnson FoM outlines the power frequency for low-voltage transistors.
- The Keyes FoM establishes thermal limits to transistors' switching behavior in ICs.
- The Baliga FoM identifies material parameters that minimize conduction losses in low-frequency unipolar transistors.
- The Baliga high-frequency FoM shows that using SiC devices for high-frequency applications (in contrast to conventional semiconductors) can significantly reduce power loss.
Formulas associated with the Johnson, Keyes, Baliga, and Baliga High-Frequency FoMs. Image (modified) used courtesy of Tesfaye Ayalew
But many research and manufacturing teams, when tasked with a new product launch, set out to create their own device-specific FoMs as well. In 2016, researchers from the Department of Mechatronics and Electronics at the University of Zilina Slovakia conducted a study in which several generations of MOSFETs and diode structures were presented in FoM methodologies. The standard FoM methodology for MOSFETs is based on the drain-source on-resistance by the gate charge (RDS(on) x Qg).
The goal was to find a proper solution for meeting DC-DC converter standards through simulated instances of switching and conduction losses. The research team evaluated hard-switching and soft-switching scenarios for various transistors, which included gallium nitride (GaN) devices, to represent new technology.
One prevailing concern with using a FoM methodology is that designers neglect certain electrical parameters in favor of others. These preferences, data-backed as they may be, can lead to gaps in device performance down the line.
UnitedSiC’s 750 V SiC FET Device Based on the FoM Method
Many manufacturers in the power space tout comprehensive FoM as a badge of honor.
A recent example comes from UnitedSiC, a global developer of silicon carbide FET and diode power semiconductors, which launched four new SiC FET devices targeted for electric vehicle (EV) chargers, DC-DC converters, variable-speed motor drives, and solar PV inverters. Using the Figures of Merit approach, UnitedSiC claims that its SiC FETs are leaping further ahead of silicon-based devices.
While the FoM model has, in the past, seemingly neglected various parameters, UnitedSiC says it was thorough in its FoM approach. UnitedSiC provides four options of two groups of 750 V FETs to choose from, both having low conduction losses and high-frequency capabilities. According to the FoM, they present a lower-than-industry-standard reverse recovery charge, which is a parameter overlooked in typical FoM-driven designs.
Reverse recovery charge is the charged storage within the diode when instantaneously switched from a forward to reverse current. By delivering this added specification, UnitedSiC’s FoMs are said to increase flexibility for designers.
UnitedSiC’s 750 V SiC FET soft-switching FoM of compared to 650 V SiC competitors. Image used courtesy of UnitedSiC
With lower device capacitances and the ability to maintain heat dissipation capability (thanks to its increase in thermal conductivity), UnitedSiC believes their FoM approach to landing at a new 750 V FET will benefit power designs across all targeted applications.
FoM: An Evolving Standard?
Within the power sphere, many experts are acknowledging that even well-established FoMs, like drain-source on-resistance by the gate charge in MOSFETs, are evolving with innovation.
"With the advent of newer gate drivers which have made driving large Qg values much easier and faster switching topologies in the constant pursuit of smaller and efficient systems, means we are seeing different parameters become ‘system critical,'" explains Nexperia contributor Siva Uppuluri.
"So, by pursuing the traditional FOM some manufacturers are spending resources to further optimize an already good Qg at the potential expense of other critical parameters."
What has been your experience with Figures of Merit? Do you find them a helpful part of the design process? Or a necessary manufacturing loop to jump through? Share your thoughts in the comments below.