Open-Source NVMe Controller Tech Can Help Academics Develop Memory Devices

September 22, 2020 by Luke James

NVMe controller technology can be difficult and expensive for academics to get their hands on. Now, a new open-source option may help EE students prototype new storage devices.

At the 2020 USENIX Annual Technical Conference (USENIX ATC) in July, electrical engineers at the Korea Advanced Institute of Science and Technology (KAIST) announced a new freely-available NVMe controller technology called OpenExpress.


OpenExpress' main hardware IP cores

OpenExpress' main hardware IP cores. Image used courtesy of Professor Myoungsoo Jung, KAIST

The technology, they say, has the potential to aid academic researchers in developing faster storage devices without eating through their budgets. The KAIST team explains that this technology gives researchers an open-source hardware framework to develop NVMe devices.


Non-Volatile Memory Express (NVMe) 

NVMe is widely used by a range of storage and non-volatile memory subsystems as a fast I/O communication interface, the study says.

It’s designed for high-performance storage devices based on a peripheral component interconnect-express (PCI-E) interface and was developed to replace the Serial AT Attachment (SATA) protocol. SATA was developed to process data on hard disk drives (HDDs) and didn’t perform well enough in solid-state drives (SSDs).


PCle interfaces connecting a CPU with SSDs and an HBA and I/O controller.

PCle interfaces connecting a CPU with SSDs. Image used courtesy of Western Digital

With data processing speeds coming in at almost six times faster in SSDs in contrast to when SATA is used, NVMe has quickly become the go-to protocol for ultra-high-speed and volume data processing. It’s also used in a variety of flash-based information storage devices. 


Academia's Shortage of NVMe Controllers

Industries make use of it by securing their own intellectual property (IP) for high-speed NVMe controllers and explore software stack challenges with NVMe storage cards. For academia, however, NVMe controller IPs aren’t widely available because, perhaps understandably, tech firms are eager to protect it.


Example of a commercial NVMe controller

Example of a commercial NVMe controller—in this case, Microchip's 16-channel gen 4 PCIe Flash controller. Image used courtesy of Microchip

This is despite the research community having a strong case for requiring an open-source hardware framework to build new controllers for NVMe devices. And although a small number of companies do provide access, it comes at a high price tag that can quite easily stretch into six figures per month.


An Open-Source NVMe Controller Tech for Universities

To address this problem, the research team at KAIST developed a NVMe controller technology that achieved parallel data processing for SSDs in a hardware automated form

The controller is comprised of a range of basic hardware IP and key NVMe IP cores. To prove its performance, the team built an NVMe hardware controller prototype using OpenExpress (OE) and designed all logics provided by OE to operate at a high frequency.


A prototype board and OpenExpress floorplan of the new technology

A prototype board and OpenExpress floorplan of the new technology. Image used courtesy of Professor Myoungsoo Jung, KAIST


The field-programmable gate array (FPGA) that was developed using OE demonstrated increased I/O data processing capacity, supporting up to 7 Gbps bandwidth. The researchers claim the FPGA also showed 76% higher bandwidth and 68% lower I/O delay when compared to Intel’s new Optane SSD.


Metrics of OpenExpress compared to Intel's Optane SSD

Metrics of FPGA built with OpenExpress compared to Intel's Optane SSD. Image used courtesy of Professor Myoungsoo Jung, KAIST

This, in theory, makes it suitable for research into ultra-high-speed and volume memory devices. 

The NVMe controller can be freely used and modified for non-commercial use by all universities and research institutes under the OE open-source end-user agreement. This makes it extremely useful for research into next-generation memory devices compatible with NVMe controllers.