NXP Unveils Edge Processor—One to Balance Complex ML, Power, and Security

November 09, 2021 by Jake Hertz

The new processor—the first of NXP's new i.MX 9 family—is customized to IoT and automotive applications.

Today’s embedded devices need to be a jack of all trades; they must run sophisticated machine learning models, operate at ultra low power, incorporate wireless connectivity, and ensure a high level of security. 

Delivering all of these features at once is not an easy feat, but many companies have taken to the challenge. NXP is one of these companies, and today it made headlines with the release of its new i.MX 93 processor—the first in a larger i.MX 9 family. The processor comes in two iterations: one aimed for industrial and consumer IoT markets and one for automotive markets. 


i.MX 93 comes into two variants

The i.MX 93 comes in two variants for consumer and industrial IoT and automotive. 


All About Circuits sat down with Amanda McGregor, NXP's senior director of product innovation for i.MX applications processors, to hear about the release firsthand. 


The New Processor Uses “Heterogeneous Domain Computing”

NXP’s new family of processors comes with a number of noteworthy features, one of which is the use of heterogeneous domain computing (HDC). 

The benefit of heterogeneous computing is that it packs a number of different computing resources on one chip. In contrast to homogeneous computing, this technology schedules certain tasks to different processing units in a way that improves power efficiency and performance. One downside of heterogeneous computing, however, is that unused processing units may consume unwanted idle power.


The i.MX 93 processor family

The i.MX 93 processor family uses heterogeneous domain computing to improve efficiency. 


Typically within an SoC, the different compute blocks will share power, clocks, and buses. In this scheme, power is wasted on certain blocks even if they’re not being used—minimizing overall SoC efficiency. 

HDC, on the other hand, breaks each computing block into its own “domain" with each having its own separate power, clocks, and buses. This scheme completely suspends one domain while keeping others active, maximizing power savings. 


Highlights of the i.MX 93 

McGregor explained that NXP’s newest processor in the i.MX family, the i.MX 93, was designed to be a “very efficient, low power, fast inferencing secure edge device.” To achieve this, the SoC uses HDC to break its processing units into three separate domains: the application domain, the flex domain, and the real-time domain. 

The application domain, which is designed for the high-performance computing of standard tasks, consists of up to two 1.7 GHz Arm Cortex-A55 cores. This domain is complemented by the real-time domain, which, McGregor claimed “is anything that we want to manage in a lower power state.”

As a lower-performance domain than the application domain, the real-time domain consists of an Arm Cortex-M33 core, which is intended for infrequent applications, such as reading a value from a sensor or updating a display. 


Block diagram of the i.MX 93 processor family.

Block diagram of the i.MX 93 processor family. 

Finally, the flex domain is where the real high-performance compute for ML lives. This domain most notably consists of the industry’s first implementation of the Arm Ethos-U65 microNPU, which was designed specifically for low-power, high-performance inference for audio- and vision-based ML tasks.

“The way it works is that the Ethos-U65 is really driven by the Cortex-M33, which sort of directs its workloads,“ McGregor said. “Then you can also leverage the Cortex-A for ML workloads as well, so it really creates a very scalable platform around machine learning at the edge.” 


End-to-End Security 

Beyond the compute aspect, NXP also prioritized security with the i.MX 93 family. 

To this end, the company has integrated its proprietary NXP’s EdgeLock Secure Enclave—a preconfigured, self-managed, and autonomous security subsystem. This system includes features like run-time attestation, silicon root of trust, trust provisioning, and fine-grain key management. 

Additionally, the i.MX 93 has partnered with Microsoft to implement Microsoft's Azure Sphere end-to-end security solution. The goal of this partnership is to provide lifecycle management as well as secure chip-to-cloud connectivity. 


“We Don't Want One Size Fits All”

While many of the benchmarking details and other specs are not currently available, the new i.MX 93 family from NXP seems poised to level up performance and efficiency specs from previous generations of i.MX processors. 

NXP mentioned a plethora of potential use cases for this low-power edge device, including machine vision and scanning, smart locks, smart lighting, and access control. In the automotive space, it may be used for general-purpose compute, intrusion detection, ML acceleration for data analytics, and driver monitoring. 


MCU-class efficiency to the Cortex-A environment

NXP says this new device brings MCU-class efficiency to the Cortex-A environment. 

McGregor concluded by noting that the virtue of this processor is that it is so specific for IoT and automotive applications. “It's all about optimizing for this set of applications—then creating a launching point if a customer needs more performance or even less performance. The i.MX 9 series can scale as needed.” she said. “We don't want one size fits all. We want to have a really good balance of performance, security, and efficiency for these applications.”


All images used courtesy of NXP.