On a Single Chip, ST Integrates ESD Protection and Network Matching for GNSS

January 25, 2021 by Adrian Gibbons

While impedance-matching and electrostatic-discharge protection usually fall on the shoulders of discrete components, a new chipset is said to integrate both features in the same IC package.

Last week, STMicroelectronics announced the release of the BPF8089-01SC6, an integrated RF front-end interface in a SOT23-6L package occupying just over 9 mm2



The BPF8089-01SC6 can interface both passive (left) and active (right) antennas to the STA8089/STA8090 RX series. Image used courtesy of STMicroelectronics


For designers thinking of adding Global Navigation Satellite System functionality to their designs, this chipset may be welcome news. According to the datasheet, the devices offer three major benefits: ESD-HBM (human body model) compliance, an integrated RF matching network, and simplified PCB interfacing.


The Dangers of ESD Damage

The first of these benefits, ESD protection, might warrant further consideration since as little as 200 V can destroy a MOSFET. First, electrostatic discharge (ESD) is an event that occurs when static electricity builds up on one surface, developing a transfer mechanism (spark gap) to a second surface of lower potential. 

ESD coupling to PCB circuitry occurs most often at the interface to the PCB—in this case, the antenna to the GNSS receiver. The potential for ESD damage exists whenever a technician or layperson touches, connects, or otherwise maintains the system's I/O, as AAC contributor Nick Davis describes in his introduction to basics of grounds, grounding, and ground symbols


initial ESD damage

About an hour after initial ESD damage, this three-terminal regulator IC failed. Image (modified) used courtesy of Bunny Studios and Chapter 9—Practical Analog Semiconductor Circuits

Why ESD Protection Should Be a Priority

Why might designers add ESD protection to their systems, despite the extra cost? There are two primary reasons: 1) ESD protection provides general reliability and helps users recognize a durable product, and 2) in most of the European Union (and military/aerospace), ESD protection is a requirement of susceptibility testing. 

Failure modes from ESD are often difficult to troubleshoot and can be tricky for designers to prove as the cause of their system's failure. Sometimes, ESD can lead to electrical overstress (EOS) by weakening a device's ability to withstand the corner case regions of their rated performance. Other times, the damage can be so widespread in the system that localizing the source is impossible. 


ESD Thresholds

ESD events are environmentally dependent; higher voltage discharge can be related to lower humidity, exceeding voltages of 35 kV for brief periods of time (nanoseconds). 

In practice, the International Electrotechnical Committee, which maintains the IEC 61000-4-2 for ESD protection standards, limits the threshold for ESD testing to 8 kV for touch discharge and 15 kV for air discharge. 


A few common anti-static logos. 

A few common anti-static logos. 

Three Benefits of ST's RF Front-End IC for GNSS Receivers

The BPF8089-01SC6 is an interface chipset meant to conjugate match an antenna to STMicroelectronics’ STA8089/STA8090 series receivers. According to ST, it offers three major benefits to designers:

  • ESD-HBM (human body model) compliance up to 8 kV (contact)/15 kV (air)
  • An integrated RF matching network
  • Simplified PCB interfacing with detailed track specifications in a smaller PCB area (when compared to discrete parts)

Without the BPF8089-01SC6, the STA8089GA receiver chipset has only limited protection for ESD-HBM events—a maximum rating of 2 kV and several pins only capable of ± 500 V.


The BPF8089-01SC6 responds to an 8 kV ESD-HBM transient

The BPF8089-01SC6 responds to an 8 kV ESD-HBM transient, demonstrating the ability to maintain downstream rated voltage thresholds. Image used courtesy of STMicroelectronics

The integrated RF matching network provides two key benefits by itself: 1) reduced system bill of materials and overall footprint and 2) reduced risk associated with the tolerance of discrete components affecting performance.

Finally, a simplified PCB design as shown below reduces risk and speeds up the time to market with design-tested specifications. 


PCB track specifications

PCB track specifications provide designers guidance on interfacing the GNSS receiver to the matching network. Image used courtesy of STMicroelectronics

ESD events below 2–3 kV normally don’t register to human sensitivity, and yet those events are enough to destroy the ST8089 receiver (and many other chips). 

Designing ESD protection into designs isn’t just good sense—it’s a business necessity both for consumer satisfaction and regulatory approval (of certain product classes). 



Have you ever lost a prototype to ESD testing? Tell us your story in the comments below.