Picocom Announces New PHY SoC to Deploy 5G Cellular Networks
Picocom claims it has developed the first system-on-chip for 5G small-cell Open RAN radio units.
Picocom recently launched the PC805, a system-on-chip (SoC) designed to simplify the deployment of 5G NR/LTE small-cell Open-RAN radio units (O-RUs), including enterprise, industrial, and private networks.
The PC805 SoC. Image used courtesy of Picocom
To better understand the significance of this new SoC on 5G deployment, it may be useful to first define what Open RAN is and how Open-RAN radio units help bring the high-speed promises of 5G to fruition.
What Is Open RAN?
Open RAN, an emerging approach to designing and implementing cellular networks, plays an essential role in the shift toward 5G networks. It isolates and standardizes the network elements, allowing them to be more interoperable and flexible.
Open-RAN radio units (O-RUs) typically operate in small cellular cells responsible for transmitting and receiving signals to and from end users. They are designed for areas that require high capacity and low latency and are compatible with the principles of Open RAN. Open RAN architectures make network components interoperable among different vendors, potentially reducing dependencies on a single vendor and reducing network deployment and maintenance costs.
To meet the needs of this emerging market, Picocom built the new PC805—the so-called first of its kind for 5G small cell O-RUs.
New SoC to Simplify 5G O-RU Deployment
The new SoC can be used for various applications with simple software changes. This is in contrast to similar FPGA-based products that require significant hardware redesign for different use cases.
The chip aggregates various bands in the spectrum with a few additional components. It can aggregate up to 4 or more 4T4R carriers in a 200 MHz instantaneous bandwidth (IBW) and supports multiple bands, including both FDD and TDD. It interfaces directly with open distributed units (O-DUs) via open fronthaul (split 7.2) and supports connections with RFICs with a JESD204B high-speed serial interface. Additionally, it integrates a RISC-V processor running a Linux OS for management and configuration.
Block diagram of the PC805 SoC. Image used courtesy of Picocom
In small cells, O-RUs convert eCPRI (or CPRI) messages from the O-DU or fronthaul gateway to IQ samples for the radio. This process involves various network elements, including low physical layer (PHY) processing, digital front end (DFE), digital pre-distortion (DPD), crest factor reduction (CFR) functions, and many interfaces.
The signals received from O-DU or fronthaul gateway usually include a combination of control information and raw signal data. Low PHY extracts and processes the relevant information. It also performs synchronization, channel estimation, and error correction. The DFE is responsible for filtering, upconversion, and amplification. DPD compensates for nonlinearities in the RF chain and the power amplifier. DPD algorithms pre-distort signals to cancel out the non-linear effects. CFR is another signal conditioner block that manages the peak-to-average power ratio and allows the amplifier to operate closer to its saturation point to increase efficiency.
A Boon to Network Design
The PC805 can be used for either a split 7.2x O-RAN radio unit or split eight remote radio heads (RRH or RRU). The on-chip CPU terminates the open fronthaul M and S planes in the split 7.2 O-RU architecture.
PC805 in split 7.2 O-RU. Image used courtesy of Picocom
The PC805C variant is compatible with RRH, using the CPRI and JESD interfaces, and supports DFE (DPD/CFR) functions. For this implementation, a fronthaul gateway (FHGW) is necessary to convert the eCPRI interface to the CPRI interface.
PC8-5 in split 8 configuration. Image used courtesy of Picocom
To simplify network design, the company also released a complete software suite and a companion RU demonstrator board, the PC805RDB. This 5G NR/LTE radio unit board features the PC805 SoC with onboard transceivers, Texas Instrument's AFE7769D 4T4R RFIC (a complete RF front end based on an iCana demonstrator design), and associated front-end supporting circuitry and software.
