Renesas Takes a Swing at HMIs With Octal-SPI and RTOS-supported MPUs
The new MPU family hopes to address traditional challenges in the design of HMI systems.
Engineers often strive to design the most intuitive and user-friendly interfaces possible when designing electronics that will have direct user interaction. This technology, known as the human-machine interface (HMI), is a central focus for user experience (UX) designers in most products and industries.
While many components of HMI are software-based, achieving smooth, intuitive, and high-definition HMI also requires the appropriate underlying hardware features.
Recently, Renesas made headlines when it announced a new family of microprocessors (MPUs) designed to optimize high-performance HMI design.
A representation of Renesas' HMI processing solution. Image [modified] used courtesy of Renesas
This article will look at some valuable features for HMI design and Renesas’ newest MPU offering.
Parallel Memory Access Challenges
When designing an HMI in an embedded application, the embedded device will often not feature enough memory to store the necessary data for generating display images. For this reason, these kinds of designs often employ off-chip memory devices, which, in the case of embedded designs, mostly come in the form of flash memory chips.
However, flash is a slow memory type, and it is often desired to have low-latency, real-time behavior of an HMI device. Historically, engineers have tried to speed up memory access by using parallel memory busses, where 8, 16, or 32 pins can connect the external memory device to the embedded device for faster read/writes.
Memory access using a single line per address. Image used courtesy of Toshiba
The challenge here is that, as more parallel access is required, the design complexity of the PCB increases significantly. Consider the situation where 32 pins are needed for interfacing with one memory chip. This situation requires the PCB engineer to layout and route 32 individual traces, taking up a significant amount of area, which is even more challenging in a space-constrained embedded design.
On top of this, parallel memory accessing can limit the design's flexibility, as each of these memory pins can only be used for that single function. Unlike other GPIO (general-purpose input/output), which can be reconfigured as desired, the parallel memory pins will have fixed functionality.
Octal-SPI for HMI
To address these challenges, engineers have developed improvements to traditional serial communication protocols.
Specifically, most embedded microcontrollers today feature quad-SPI functionality, with more extreme cases requiring octal-SPI functionality. These protocols are improvements on traditional serial-peripheral interfaces (SPI). Meaning that, instead of using separate data lines for input and output, data lines can be dynamically configured to serve as either.
Quad-SPI allows for each data line to be either input or output. Image used courtesy of Texas Instruments
In the example of octal-SPI, the protocol only requires 8 total data lines to implement what would’ve required at least 16 data lines in a traditional SPI. The benefit here is a lower pin count needed for the embedded device and less design complexity for the PCB. As a result, designers can save space in their design or add more functionality to their PCB within the same area.
Renesas Targets HMI Systems With RZ/A3UL
Recently, Renesas announced a new MPU family designed to address design challenges for low-latency HMI systems. With the new MPU family, Renesas hopes to simplify the design of high-definition HMI systems while allowing for user-friendly features like fast boot-up.
The device, dubbed the RZ/A3UL, is a microprocessor unit built around a 1 GHz, 64-bit Arm Cortex-A55 CPU core and a real-time operating system (RTOS). According to the company, combining these two allows customers to achieve systems that start-up in less than a second after boot-up.
These features, along with an integrated dedicated LCD controller, allow the RZ/A3UL solution to offer the fast response times required by HMI systems in environments such as industrial and home appliances.
Block diagram of the RZ/A3UL. Image used courtesy of Renesas
On top of this, the new MPU family comes with an Octal-SPI memory interface to allow for improved memory accesses without significantly increasing the design complexity of the system. Other notable features include:
- CAN-FD interfaces
- Two 12-bit ADCs
- 128 kB of on-chip RAM with ECC
- 256 kB of shared L3 cache
All in all, this new MPU hopes to be a solution to up the ante for better HMI systems.
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