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Research Efforts Signal Next Steps for Quantum Processor Evolution

January 14, 2023 by Kristijan Nelkovski

A trio of research papers offers new ideas that may solve some of the biggest hurdles to quantum processing technology.

Among the vast sea of alternative computing methods being developed in the hopes of surpassing the physical limitations of semiconductors, quantum computing remains a prominent area of research with top universities and multi billion dollar companies working on bringing to fruition the power and performance that this technology promises to achieve.

In this article, we’ll examine three scientific papers from prominent universities and research institutes. What these papers have in common is the goal to overcome these problems and take the next step into scaling quantum processors.

 

Transporting Semiconductor Qubits

Working on a novel approach for increasing the number of qubits within a quantum processor, physicists from RWTH Aachen University and the Jülich Research Institute in Germany in September published their findings on the development of a stable transportation process for quantum information carrying particles.

 

Shown here is the semiconductor quantum chip with quantum bus, the result of the JARA cooperation of Jülich Research Institute and RWTH Aachen University.

Shown here is the semiconductor quantum chip with quantum bus, the result of the JARA cooperation of Jülich Research Institute and RWTH Aachen University. Image used courtesy of Jülich Research Institute / Sascha Kreklau

 

Using silicon and germanium spin qubits (quantum bits based on the spin of electrons and electron holes), the team led by Dr. Lars Scheiber was able to create a “quantum bus” capable of transporting electrons 5,000 times over a distance of 560 nm without encountering any significant errors.

Contrary to other approaches of steering electrons which require precise signal adjustment as well as complex control electronics, the method proposed by the RWTH Aachen and Jülich team implements a far simpler system using only four sine waves as control signals that generate a potential wave on which according to the scientists the electrons can simply “surf over” interference.

Although decreasing interference solves one of the biggest challenges in quantum computing, Dr. Scheiber’s team have yet to show in practice that their qubits retain data encoded in electron spin after transportation, however their theoretical calculations prove that this could be possible using silicon within certain electron speed ranges. 

What started as part of the European QuantERA consortium, the “quantum bus” is currently the basis of more than ten filed patents showing promising results as it might hold the key to interface and control millions of qubits at a time without needing the massive infrastructure that current quantum computer designs rely on. 

 

Increasing the Number of Interconnected Spin Qubits

Back in September, a group of scientists from QuTech, the TU Delft quantum computing research institute, announced their findings in the development of a novel silicon based method for scaling quantum processors.

The team led by professor Lieven Vandersypen created a six spin qubit silicon chip using an array of electron based quantum dots spaced 90 nm apart forming a shape that closely resembles a traditional semiconductor transistor.

 

Image of the six qubit quantum processor. The qubits are created by tuning the voltage on the red, blue, and green wires on the chip.
Image of the six qubit quantum processor. The qubits are created by tuning the voltage on the red, blue, and green wires on the chip. Image used courtesy of QuTech

 

According to the research paper, this structure can be controlled using finely tuned microwave radiation, magnetic fields and electric potentials for reading and writing information onto individual qubits, as well as making them interact with each other and creating quantum logic gates and entangled systems of two or three electrons each.

Doing so, professor Lieven Vandersypen’s chip achieved respectable fidelities for universal operation, state preparation and measurement of qubits while decreasing error rates compared to other architectures which is a valuable step towards creating silicon based fault tolerant quantum computers.

What sets this research apart from others is that the QuTech team was capable of maintaining precision while increasing the number of qubits on a chip that’s produced using familiar semiconductor manufacturing methods, as opposed to superconducting quantum computers which require a far more complex to develop infrastructure.

 

Scaling a Quantum-inspired Processor

Another breakthrough in the field comes from Tokyo University of Science (TUS). The team of researchers led by professor Takayuki Kawahara are working on a new approach, announced in September, toward a scalable and fully coupled quantum inspired device. This device is called an annealing processor or annealer for short. The paper was published in Microprocessors and Microsystems.

While not necessarily leveraging the quantum properties of particles, annealers are capable of efficiently solving problems such as portfolio, logistics and traffic flow optimization by emulating the behavior of an Ising model—in other words, describing the spins of interacting magnets.

Professor Kawahara’s architecture, developed in 28 nm CMOS logic (simulated annealing as opposed to quantum annealing such as D-Wave’s quantum annealer research) and featuring 512 fully coupled spins, was first presented in 2020 at the IEEE SAMI conference, although back then this design was difficult to scale due to the number of interconnections between individual spins.

Now, the team have devised a new method where the calculation of their system's energy state is divided among an array of multiple chips and then gathered by a control chip to form a final energy result used for updating the values of the simulated spins.

 

The TUS researchers proposed a fully connected scalable annealing processor. The approach uses an array calculator consisting of multiple coupled chips and a control chip.

The TUS researchers proposed a fully connected scalable annealing processor. The approach uses an array calculator consisting of multiple coupled chips and a control chip. Image used courtesy of Tokyo University of Science

 

This has allowed the group of researchers to develop a new version of the system, a 384 spin FPGA implementation which according to their tests was capable of solving optimization problems 584 times faster and 46 times more energy efficient when compared to CPU simulations.

Professor Kawahara hopes to further his research and create a custom LSI chip in order to increase capacity, performance and efficiency of their method, hoping to improve fields that require solving complex optimization problems such as drug research and materials science.

 

What Does All This Mean for the Future?

Clearly 2022 wrapped on a positive and hopeful note for quantum computing. While there’s still a long road ahead in developing quantum processors with millions as opposed to a handful of qubits, the research covered in this article paves the way with new ideas for solving some of the biggest challenges plaguing this field.

Studying electron transportation, developing fault tolerant spin qubit systems as well as simulating quantum structures through the use of traditional electronics could hold the key in circumventing the limitations presented by the laws of quantum mechanics and taking quantum computers outside of the lab and into real world situations, solving complex real world issues.