Technical Article

The CMOS Transmission Gate

August 12, 2016 by Robert Keim

This technical brief presents a simple MOSFET configuration that can be used as a voltage-controlled switch.

This technical brief presents a simple MOSFET configuration that can be used as a voltage-controlled switch.

Supporting Information

We usually see MOSFETs arranged with their sources and drains connected—either directly or through, for example, a resistor or active load—to positive and negative supply rails, with the gate acting as the input terminal. This is true in both analog circuits, such as the common-source amplifier, and digital circuits, such as the ubiquitous CMOS inverter. It’s good to remember, though, that the MOSFET is not limited to configurations such as these.

The channel created by a sufficiently high gate-to-source voltage allows current to flow between the source and drain terminals, and in this sense the MOSFET is a voltage-controlled switch. Thus, there is no law that prevents us from using the source and drain as input and output terminals, with the control voltage applied to the gate.

A single NMOS (or PMOS) transistor can be used as a voltage-controlled switch. The “circuit” (really just a single transistor) is the following:



Note that I have removed the arrow that usually identifies the source. This is because the source terminal actually changes according to whether V1 is higher than V2 or V2 is higher than V1. Also, the use of V1 and V2 instead of VIN and VOUT is intended to emphasize that this single NMOS transistor can indeed conduct current in both directions.

As you probably expected, this circuit is far from a perfect switch. One problem is the source voltage: The current through the MOSFET is influenced by the source voltage, and the source voltage depends on whatever signal is passing through the switch. Indeed, if the gate is controlled by a driver that cannot exceed VDD, the transistor can pass signals only as high as VDD minus the threshold voltage. This threshold-voltage limitation is made even worse by the body effect, which comes into play when the FET’s source and body terminals are not at the same potential.

When you analyze and ponder this switch, you recognize a certain asymmetry. For example, if we are using this switch for pass-transistor logic, the NMOS can effectively pass a logic-low signal but not a full logic-high signal. Is it possible to modify the circuit in a way that will redress this asymmetry? If you are maintaining a good CMOS mentality, your intuition might tell you that we could achieve better overall performance by incorporating a PMOS transistor to compensate for the deficiencies of the NMOS. In this case, your intuition is correct.



Here we have a PMOS in parallel with the NMOS; I used an “invert” circle to identify the PMOS transistor. Note that the control signal applied to the PMOS is the complement of the control signal applied to the NMOS; this is reminiscent of the CMOS inverter, where a logic-high voltage turns on the NMOS and a logic-low voltage turns on the PMOS.

This CMOS transmission gate is a synergistic system—the NMOS provides good switch performance under conditions that are favorable for itself but not for the PMOS, and the PMOS provides good switch performance under conditions that are favorable for itself but not for the NMOS. The result is a simple yet effective bidirectional voltage-controlled switch that is suitable for both analog and digital applications.

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    Alexpascone September 13, 2016

    Very interesting. It would be very useful as well as interesting also the study about the equivalent resistance of the parallel of the nMos and pMos according to their working region during the transition 0-vdd/2 and vice versa.

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  • uwezi September 14, 2016

    Hi Alexpascone,
    since this behavior is depending on transistor parameters like the transconductance and threshold voltage it is impossible to make a general study. However, you can simulate the behavior quite easily with a simulator like LTspice (free from LT’s homepage). Using standard, discrete pMos and nMos transistors with the body connected to the source internally you still get reasonable performance. The output resistance of a transmission gate using Vgn=5V, Vgp=0V and a symmetric sine wave with 2.5 V amplitude around a 2.5 V baseline is well below 50 ohm.

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