TSMC Grants a Sweep of EDA Certifications for New Process Nodes
To ensure that designers have the right tools for the job, TSMC announced a slew of EDA tool certifications for its most advanced processes—ranging from 3 nm nodes to 3D semiconductor integration.
In a bid to help designers rapidly adopt their advanced processes, Taiwan Semiconductor Manufacturing Company (TSMC) has recently granted a slew of certifications for EDA tools targeting their advanced nodes.
With the release of the N3E, N4P, and 3DFabric processes, new and unique design requirements mandate a new certification to ensure that both the designer’s system requirements and TSMC’s process requirements are all met to reduce time-to-market.
TSMC design solutions evolving over time. As more time passes, more and more technologies are offered to service a variety of design needs. Image used courtesy of TSMC. (Click image to enlarge)
In this article, a glance at TSMC’s advanced processes and their implications will be given, followed by an overview of the certifications granted by TSMC and how these may help future designers.
Keeping the Advancements Coming
TSMC, continuing the trend toward smaller and denser transistors, has previously announced its newest digital nodes, N3E and N4P, to allow designers to keep up the pace in reducing overall IC size, creating more room for additional features on the same size wafer. Both of these nodes are extensions of existing technologies but offer enhanced performance when compared to their original counterparts.
The N3E technology, a 3 nm “enhanced” technology, boasts considerable improvements in speed and power consumption compared to previous technologies. In addition, the freedom to implement the FinFETs in a custom manner regarding feature size allows for optimal tradeoffs to be made regarding speed, area, and efficiency.
N3E process variations offered to designers to improve performance vs power. Image used courtesy of TSMC
The N4P technology, a 4nm process, is similarly an extension of the N4 platform. Appended with a “P” to represent performance, the N4P process delivers an 11% performance boost compared to the N5 platform and a 6% boost over the N4 platform. Built for easy migration from 5 nm-based designs, the N4P platform allows designers to boost the performance of their designs near painlessly.
Finally, in a bid to stave off the end of Moore’s Law, TSMC has also granted certifications for its 3DFabric process: a technology that aims to move the IC design field from a primarily planar to a volumetric point-of-view. With 3DFabric, interested designers may add another dimension to their projects, allowing for broader integration using TSMC’s silicon stacking and advanced packaging technologies, all while maintaining the same occupied area on the destination board.
Getting the Right Tool for the Job
Despite what some engineers may believe about their ability to design working circuits, it’s often true that we need some sort of automation or simulation to verify complex designs. In order to ensure that EDA tools not only meet designer needs but the needs of the technology process, TSMC has formed the EDA Alliance to work directly with EDA tool providers.
The EDA Alliance consists of 16 partners in total, including Cadence, Siemens, Ansys, and Synopsys. Each of these groups offers its own EDA tool compatible with the TSMC processes, ranging from physical verifications to timing and power signoffs. In order to ensure compatibility and reduce time-to-market, TSMC has issued certifications to assure designers that their EDA tools meet the internal requirements of TSMC.
3DFabric EDA tool certification status as of 10/26/2022. Image used courtesy of TSMC. (Click image to enlarge)
TSMC has primarily focused on issuing certifications for its advanced nodes N3E, N4P, and 3DFabric. Depending on the specific application, certain EDA tools may offer improved features or better performance. Despite the high number of offerings for EDA tools, designers can rest assured that, so long as their desired tool is certified, it is guaranteed to work with TSMC’s advanced nodes.
Feel Confident in Your Custom Designs
With the inevitable end of Moore’s Law closer than ever, high-performing advanced nodes and new design methodologies such as 3D integration become more critical than ever. However, without proper EDA support, the job of a designer becomes more and more difficult.
The precedent set by TSMC to work directly with EDA companies marks a beneficial trend in the design world of top-down support networks, reducing the development time for EDA tools and allowing designers to begin working on next-gen designs as quickly as possible without the concern that they don’t have the proper tools.