Two Companies Team Up to Show What “Holistic” Hardware Security Looks Like

Hardware security is the next-generation method for improving device security.

Two companies, UltraSoC and Agile Analog, recently announced their intentions to team up on a "comprehensive hardware-based cybersecurity infrastructure." According to the press release, the end solution will include Agile Analog's on-chip analog monitoring IP and UltraSoC's embedded on-chip analytics.

 

The two companies want to combine the virtues of analog and digital monitors on an SoC. Image used courtesy of Agile Analog

 

UltraSoC and Agile Analog hope that the infrastructure will stop attacks at the hardware level—namely those attacks that target power supply levels and clock signals. 

 

The UltraSoC-Agile Analog Collaboration

The two companies are taking a holistic approach to on-device security, combining analog capabilities and system-level digital monitoring.

Each player brings a different dimension of silicon-level security to the table. While the press release doesn't explicitly state the specific products going into this collaborative architecture, UltraSoC and Agile Analog's offerings indicate the type of IP we might expect in this solution.

 

UltraSoC's Efforts to Detect, Block, and Record

UltraSoC has recently announced its new hardware security IP system that is designed to detect, block, and record attempted hardware attacks on a system.

The design, called UltraSoC Bus Sentinel, allows for security protection in real-time with systems reacting to attacks in microseconds instead of milliseconds. One feature that makes the Bus Sentinel interesting is that it is not only able to block attacks but also creates a record of normal operation and anomalous operation to improve its ability to detect future attacks.

The system can be configured to look at all types of attacks, including processes that try to access registers not normally available (such as sensitive control registers), protected memory locations, and attempts to run processes without proper authorization.

 

UltraSoC's "holistic" on-chip security includes sentinels that block suspicious transactions at hardware speed. Image used courtesy of UltraSoC

 

The Bus Sentinel can also respond to attacks in numerous ways, such as gating (to prevent an instruction from being further processed), modifying a transaction, and generating responses on buses. It also includes signal interrupts onto the main core for executing routines.

UltraSoC also recently announced the CAN Sentinel, a new IP geared for the automotive industry, which lives on the bus and monitors transactions in a vehicle's electronic control unit (ECUs). According to UltraSoC, the device can pinpoint suspicious activity and block malicious messages and silencing attacks.

 

Agile Analog Targets Side-Channel Attacks

Creating a secure SoC is one way to provide a level of safety, but it does not guarantee comprehensive hardware security.

Many attackers will bypass a secure system and attack subsystems connected to it, which may themselves be less secure. A classic example of such an attack was when hackers attacked a casino's aquarium smart thermostat to gain access to the highly-sensitive network; the result was the theft of personal details of clients. Such an attack where a system is bypassed is called a side-channel attack and is commonly achieved on hardware with clock glitches, voltage spikes, and resets.

 

Designers of IoT devices, like smart thermostats, must be increasingly aware of hardware security concerns.

 

Agile Analog, who are developers of analog IP solutions, have combined multiple IP technologies to create the TVC side-channel attack monitor security core. This security core protects a design from side-chain attacks in hardware with a multitude of sensors that check temperature spikes, clock glitches, voltage spikes, and signal manipulation.

The system can be used to send a warning signal to a device processor that a possible hardware attack may be in progress. The security sub-routines can then take appropriate action; for example, a processor can reset or wipe the memory.

The IP is designed for use in IoT, security, automotive, and general SoCs and can be tailored to a specific architecture to make integration as easy as possible.

 

How Will These Technologies Come Together?

Mike Hulse, CTO at Agile Analog, explains how this new architecture will benefit electronic manufacturers, especially in industries like automotive: "The complementary nature of our technologies—UltraSoC offering system-level functional monitoring, and Agile Analog looking at underlying analog behavior—makes our products a natural fit for cybersecurity applications.”

Interconnected with a message-based architecture, UltraSoC's SoC includes embedded transaction-aware hardware monitors. These monitors detect anomalies and offset mitigation efforts system-wide. With Agile Analog's help, the system will also pull data from various analog monitors, including clock, temperature, and voltage, into the UltraSoC infrastructure. 

UltraSoC's CTO, Gajinder Panesar, remarks, "We believe that partnerships like this are key to enabling a holistic secure embedded cybersecurity architecture with monitoring capable of delivering from fab to field.”

 

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If you were to design your own comprehensive hardware security solution, what would you include? Share your thoughts in the comments below.