Update HDL Code in Space From Earth? ST and Xilinx Team Up for Rad-hard FPGAs
The race for space has created a flood of innovations in space-rated tech. Hoping to strike gold with updatable FPGAs, Xilinx and STMicroelectronics have teamed up for a rad-hard solution.
Developing technology for space has always posed a series of unique challenges to the design engineer. Far beyond the protective veil of Earth’s atmosphere and magnetosphere, space electronics are subject to ionizing radiation, which terrestrial engineers typically don't need to be concerned about.
Earth’s atmosphere and magnetosphere protect it from ionizing radiation. Image used courtesy of L. Han/IAEA
These challenges have led to the field of radiation-hardened, or rad-hard, electronics, one's with built-in immunity to the harmful effects of ionizing radiation. The newest rad-hard offering meant for space comes from a collaboration between Xilinx and ST.
This article will explore the new rad-hard FPGAs that this collaboration is creating and how they can impact the future of space electronics.
How ST Met Xilinx for Space FPGAs
Team ups, especially when both companies are huge shakers in the hardware industry, are always interesting to see who brings what to the table. In developing this new FPGA, the major contribution from ST was the development of a high-reliability power source.
When designing a power source for rad-hard electronics, an important feature is both accuracy and stability. In power-design talk, this equates to fast transient responses, a highly accurate internal voltage reference, and a very stable switching frequency.
Typical application circuit of the RHRPMPOLO01. Screenshot used courtesy of ST [PDF Datasheet]
For the new FPGA, Xilinx uses both ST's RHRPMPOL01 synchronous buck regulator and its RHFL6000A linear voltage regulator. Both devices are rad-hard themselves and work in the FPGA to provide an output of 0.8V from an input of 12V.
The RHRPMPOL01 is a point-of-load converter that consists of an N-channel power MOSFET, bootstrap diode, and integrated system protection.
By leveraging synchronization and current sharing, the converter is well suited to handle the demanding transient loads posed by FPGAs. The RHFL6000A is a low-dropout (LDO) regulator, which features adjustable output voltage, built-in protection, and remote sensing and external inhibit control circuitry.
Updatable From Earth?
Earlier this week, Xilinx released its newest rad-hard FPGA, the Kintex UltraScale XQRKU060, which was built largely in collaboration with ST.
The FPGA itself integrates 38 Mb of block RAM, over 700k logic cells, and roughly 2700 DSP slices, giving it a relatively high DSP and block RAM-to-logic ratio. Also notably, the new offering has the ability for over-the-air software upgrades, meaning that the hardware description language (HDL) code, and subsequent hardware, can be updated while the device is in orbit.
Block diagram of the XQRKU060’s resources. Image used courtesy of Xilinx
Concerning its rad-hard capabilities, one of the big design points for the FPGA was to counteract the potential effects of a single-event upset (SEU) which is defined as the corruption of information stored in a memory element.
To this end, Xilinx implemented over 40 proprietary circuit design and layout techniques in the new FPGA, including specially designed configuration memory and block RAM, which leverages embedded error detection and correction.
Overall, the FPGA should withstand a total ionizing dose (TID) of up to 120Krad and has a single-event latch-up (SEL) immunity of 80 MeV-cm2/mg.
The collaboration between Xilinx and ST has yielded a unique product for use in future space technology.
One of the crucial aspects of this device is its ability to update the HDL while the device is in orbit. Not only will this help resolve bugs that may arise in space, but it will also make space electronics more economical, being able to be updated and improved while still in orbit.
With constant innovation and creative ways of reworking Earth tech for space applications, the sky really is the limit.
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