Exploring the Pros and Cons of Silicon Carbide (SiC) FETs: A New MOSFET from Cree

Here's a quick look at the pros and cons of silicon carbide FETs using the C3M0075120K MOSFET from Cree as a reference.

This article is about a silicon carbide field-effect transistor. I think we’re all familiar with silicon-based semiconductors, but what’s this silicon carbide business? Let’s take a look.

As the name implies, silicon carbide (SiC) is a compound of silicon and carbon. Apparently someone figured out that this particular compound is significantly better than silicon for high-power/high-voltage semiconductor devices. Information from Cree—the company that created the first SiC MOSFET—indicates that SiC has three primary advantages over silicon:

• higher critical breakdown field
• higher thermal conductivity
• wider bandgap

The higher critical breakdown field allows a given voltage rating to be maintained while reducing the thickness of the device, and less thickness means less on-state resistance. The higher thermal conductivity corresponds to higher current density, and the wider bandgap leads to lower leakage current at high temperatures. The bottom line is that if you’re using a transistor for switching and you might be dealing with seriously high currents or voltages, SiC is worth a look.

Four Pins?

We’re accustomed to three-terminal transistors—base, collector, emitter for a BJT and gate, drain, source for a MOSFET. But a quick look at the datasheet for the C3M0075120K reveals a troubling divergence from the norm.

 

All images used courtesy of Wolfspeed

 

As you can see, we have two source terminals: “driver source” and “power source". The driver source is essentially a reference terminal for the circuitry driving the gate. If the gate driver is referenced to the same ground that receives the load current, inductance in the load-current path can lead to troublesome feedback. If the driver-source terminal is used as the reference for the driver circuitry, the negative effect of the inductance is reduced (or maybe mostly eliminated—I’m really not sure how effective the technique is).

Drawbacks

SiC MOSFETs don’t seem particularly common to me. It’s relatively new technology, so that is probably part of the explanation. But I wouldn’t be surprised to find that some designers avoid them because they’re often not worth the trouble. The performance advantages of SiC are undeniable, but what are the downsides?

Well, cost is one of them, but I’m thinking more about circuit complexity. The last paragraph in this app note from Wolfspeed (“a Cree company”) gives you a good idea of some of the challenges. One that stands out to me is the need for a 20 V gate drive with a –2 V to –5 V bias.

One other interesting detail is related to SiC’s bandgap. The wide bandgap leads to a high forward voltage for SiC diodes, and thus you have to be careful when relying on the body diode in a SiC MOSFET—in the case of the C3M0075120K, the forward voltage drop is around 4 V!

However, focusing on the negative is somewhat beside the point here. You shouldn’t be looking at SiC devices if you can get the job done with a standard FET or BJT or IGBT. SiC comes into play when you really need to maximize performance and, if you’re in that situation, you are probably ready to cope with the disadvantages.

Specs

The following plot conveys the current-carrying abilities of the C3M0075120K. We’re talking about serious current here.

 

 

So when the drain-to-source voltage (V_DS) is low, the max current is limited by the on-state resistance, which is about 75 mΩ with a gate-to-source voltage (V_GS) of 15 V. At moderate V_DS, the part can actually sustain 100 A for short periods of time.

This is a good opportunity to remind ourselves that on-state resistance depends on V_GS. If you want low R_DSon, you need more gate-to-source voltage, and even with standard FETs this often means some sort of charge-pump arrangement so that you can boost the gate voltage above the supply rail.

 

 

The theoretical threshold voltage for the C3M0075120K is ~2.5 V, but notice how the above plot doesn’t even bother with V_GS lower than 11 V. The point is, if you want low on-state resistance (and in high-current applications, you do), you need to go way above the typical threshold voltage.

Temperature, Temperature, Temperature

I’ll conclude with one of my favorite power-electronics themes: The specifications in the datasheet will avail you nothing if your transistor is on fire. You need to consider the relevant thermal conditions and ensure that your device will be able to maintain an acceptable junction temperature. And remember to derate!

 

 

---

 

Do you have any experience with SiC transistors? Feel free to share any helpful information in the comments.