Digital Circuits

Basic Logic Gate Troubleshooting

22 questions By Tony R. Kuphaldt

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Question 1 of 22

Counting practice: count from zero to thirty-one in binary, octal, and hexadecimal:

Reveal answer

No answers given here - compare with your classmates!

Notes:
In order to familiarize students with these “strange” numeration systems, I like to begin each day of digital circuit instruction with counting practice. Students need to be fluent in these numeration systems by the time they are finished studying digital circuits!

One suggestion I give to students to help them see patterns in the count sequences is “pad” the numbers with leading zeroes so that all numbers have the same number of characters. For example, instead of writing “10” for the binary number two, write “00010”. This way, the patterns of character cycling (especially binary, where each successively higher-valued bit has half the frequency of the one before it) become more evident to see.
Question 2 of 22

Predict how the operation of this logic gate circuit will be affected as a result of the following faults. Consider each fault independently (i.e. one at a time, no multiple faults):

Output of OR gate U₂ fails low:

Output of inverter gate U₃ fails low:

Output of AND gate U₁ fails high:

For each of these conditions, explain why the resulting effects will occur.

Reveal answer

Output of OR gate U₂ fails low: Gate U₄ output stuck in the low state.

Output of inverter gate U₃ fails low: Gate U₄ output stuck in the low state.

Output of AND gate U₁ fails high: Gate U₄ output simply equal to [D], no other inputs have any effect on U₄‘s output.

Notes:
The purpose of this question is to approach the domain of circuit troubleshooting from a perspective of knowing what the fault is, rather than only knowing what the symptoms are. Although this is not necessarily a realistic perspective, it helps students build the foundational knowledge necessary to diagnose a faulted circuit from empirical data. Questions such as this should be followed (eventually) by other questions asking students to identify likely faults based on measurements.
Question 3 of 22

Predict how the operation of this logic gate circuit will be affected as a result of the following faults. Consider each fault independently (i.e. one at a time, no multiple faults):

Output of AND gate U₂ fails low:

Output of AND gate U₂ fails high:

Output of inverter gate U₁ fails low:

For each of these conditions, explain why the resulting effects will occur.

Reveal answer

Output of AND gate U₂ fails low: Gate U₃ output stuck in the high state.

Output of AND gate U₂ fails high: Gate U₃ output simply equal to [C], no other inputs have any effect on U₃‘s output.

Output of inverter gate U₁ fails low: Gate U₃ output stuck in the high state.

Notes:
The purpose of this question is to approach the domain of circuit troubleshooting from a perspective of knowing what the fault is, rather than only knowing what the symptoms are. Although this is not necessarily a realistic perspective, it helps students build the foundational knowledge necessary to diagnose a faulted circuit from empirical data. Questions such as this should be followed (eventually) by other questions asking students to identify likely faults based on measurements.