Time Constant Calculations

Determine the amount of time needed for the capacitor voltage (V_C) to fall to the specified levels after the switch is thrown to the “discharge” position, assuming it had first been charged to full battery voltage:

VC Time 10 volts 8 volts 6 volts 4 volts 2 volts

Trace the direction of electron flow in the circuit, and also mark all voltage polarities.

A submarine sonar system uses a “bank” of parallel-connected capacitors to store the electrical energy needed to send brief, powerful pulses of current to a transducer (a “speaker” of sorts). This generates powerful sound waves in the water, which are then used for echo-location. The capacitor bank relieves the electrical generators and power distribution wiring aboard the submarine from having to be rated for huge surge currents. The generator trickle-charges the capacitor bank, and then the capacitor bank quickly dumps its store of energy to the transducer when needed:

As you might well imagine, such a capacitor bank can be lethal, as the voltages involved are quite high and the surge current capacity is enormous. Even when the DC generator is disconnected (using the “toggle” disconnect switch shown in the schematic), the capacitors may hold their lethal charge for many days.

To help decreases the safety risk for technical personnel working on this system, a “discharge” switch is connected in parallel with the capacitor bank to automatically provide a path for discharge current whenever the generator disconnect switch is opened:

Suppose the capacitor bank consists of forty 1500 μF capacitors connected in parallel (I know the schematic only shows three, but . . .), and the discharge resistor is 10 kΩ in size. Calculate the amount of time it takes for the capacitor bank to discharge to 10 percent of its original voltage and the amount of time it takes to discharge to 1 percent of its original voltage once the disconnect switch opens and the discharge switch closes.

The model “555” integrated circuit is a very popular and useful “chip” used for timing purposes in electronic circuits. The basis for this circuit’s timing function is a resistor-capacitor (RC) network:

In this configuration, the “555” chip acts as an oscillator: switching back and forth between “high” (full voltage) and “low” (no voltage) output states. The time duration of one of these states is set by the charging action of the capacitor, through both resistors (R₁ and R₂ in series). The other state’s time duration is set by the capacitor discharging through one resistor (R₂):

Obviously, the charging time constant must be τ_charge = (R₁ R₂)C, while the discharging time constant is τ_discharge = R₂C. In each of the states, the capacitor is either charging or discharging 50% of the way between its starting and final values (by virtue of how the 555 chip operates), so we know the expression e^{[(−t)/(τ)]} = 0.5, or 50 percent.

Develop two equations for predicting the “charge” time and “discharge” time of this 555 timer circuit, so that anyone designing such a circuit for specific time delays will know what resistor and capacitor values to use.

Footnotes:

For those who must know why, the 555 timer in this configuration is designed to keep the capacitor voltage cycling between ¹/₃ of the supply voltage and ²/₃ of the supply voltage. So, when the capacitor is charging from ¹/₃V_CC to its (final) value of full supply voltage (V_CC), having this charge cycle interrupted at ²/₃V_CC by the 555 chip constitutes charging to the half-way point, since ²/₃ of half-way between ¹/₃ and 1. When discharging, the capacitor starts at ²/₃V_CC and is interrupted at ¹/₃V_CC, which again constitutes 50% of the way from where it started to where it was (ultimately) headed
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