SPDIF Interface for Digital Transmission on Devices

SPDIF Interface for Digital Transmission on Devices


Category: Communication Controller

Created: April 12, 2004

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Stable

Additional info: Design done, FPGA proven, Specification done

WishBone compliant: Yes

WishBone version: n/a

License: LGPL


The SPDIF interface (Standard IEC958 "Digital audio interface") allows transmission of digital audio signals between devices in a digital format. The goal of this project is to allow a controller/cpu with Wishbone interface to transmit and receive digital audio.


- Separate transmitter and receiver
- Dual sample buffer architecture with configurable buffer size
- Access to channel status and subframe bits
- Supports both 16bit and 32bit data bus


- SPDIF Interface V1.1 has been released.