8 Bits Tiny SPI Master Controller

8 Bits Tiny SPI Master Controller


Category: Communication Controller

Created: January 07, 2011

Updated: January 27, 2020

Language: Verilog

Other project properties

Development Status: Beta

Additional info: Design done, FPGA proven

WishBone compliant: Yes

WishBone version: n/a

License: LGPL


This is an 8 bits SPI master controller. It features optional
programmable baud rate and SPI mode selection. Altera SPI doesn't
support programmable rate which is needed for MMC SPI, nor does
Xilinx SPI.

It is small. It combines transmit and receive buffer and remove unused
functions. It takes only 36 LEs for SPI flash controller, or 53 LEs for
MMC SPI controller in an Altera CycoloneIII SOPC project. While Altera
SPI takes around 143 LEs. OpenCores SPI takes 857 LEs and simple SPI
takes 171 LEs.

It doesn't generate SS_n signal. Please use gpio core for SS_n, which
costs 3- LEs per pin. The gpio number is used for the cs number in
u-boot and linux drivers.