Configurable VIIRF - Versatile IIR Filter for Any Transfer Function
Details
Category: DSP Core
Created: Jun 05, 2017
Updated: Jan 27, 2020
Language: VHDL
Other project properties
Development Status: Stable
Additional info: FPGA proven
WishBone compliant: No
WishBone version: n/a
License: Others
Description
This project comprises the VHDL description and configuration script of a configurable IIR filter.
The VIIRF can implement any transfer function (highpass, lowpass etc.) that can be represented as a cascade of second-order sections (SOS), which is an numerically very stable form of implementation.
The configuration script takes the (floating-point) SOS-matrix (and gain-matrix G, if required) and configures the (quantized) filter. It also simulates a step-response and generates testbench-files.
No vendor-specific language constructs (e.g., Block-RAM or DSP-cores) are used, such that the filter is usable in any development environment.
The sources and documentation are hosted at GitHub:
https://github.com/MauererMVIIRF