Enhanced MIPS based on MIPS789 Opencores Project
Details
Category: Processor
Created: November 27, 2010
Updated: January 27, 2020
Language: Verilog & VHDL
Other project properties
Development Status: Stable
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
This project is based on MIPS789 opencores project.We used MIPS789 core and added the cache infrastracture and AMBA bus from LEON3.The final core executes MIPS I instructions.It is downloaded on a Spartan3 fpga(gr-xc3s-1500).In order to test it we used the Leon3 Testbench.
