Plasma with FPU - Based on MIPS I implementation

Plasma with FPU - Based on MIPS I implementation


Category: Processor

Created: July 01, 2015

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Stable

WishBone compliant: No

WishBone version: n/a

License: Others


This project is based on an implementation of MIPS I specified core by Steve Rhoads: plasma


entity plasma is


   core_idx : natural := 0;

   FPU_FLAG : string := "OF";

   SIM_FLAG : string := "ON";

   DEBUG_FLAG : string := "OF"



   clk : in std_logic;

   rst : in std_logic;

   instr_addr : out std_logic_vector(31 downto 0);

   data_addr : out std_logic_vector(31 downto 0);

   rd_mask : out std_logic_vector(3 downto 0);

   wr_mask : out std_logic_vector(3 downto 0);

   instr_stall : in std_logic;

   data_stall : in std_logic;

   instr_in : in std_logic_vector(31 downto 0);

   data_to_cpu : in std_logic_vector(31 downto 0);

   data_from_cpu : out std_logic_vector(31 downto 0)


end entity plasma;

generic flags controls choice of intern components:

flag meaning
core_idx for many core simulation this flag identifies particular core (simulation only)
FPU_FLAG "ON" activates simulative FPU components
SIM_FLAG "ON" activates calculation from extern libraries and accelerates simulation, "OF" makes the core synthesizable
DEBUG_FLAG "ON" activates verbose debugging output, each register file access is reported (simulation only)


Intern structure


Simulative test

1. execute

2. go to (automatically create) directore "workspace"

3. execute "" script

The program executes an encoding algorithm that converts an .bmp file to .jp2 file (JPEG2000 format). Source code is from openJPEG project. The folder test/program contains simulation output (file "memory_out.mem") and a script "" can generate a binary from this output. By replacing the file "test.bmp" and executing script "" the given .bmp file will be converted by simulation run.