GPU Core Design in VHDL

GPU Core Design in VHDL


Category: Processor

Created: February 08, 2015

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Stable

Additional info: Design done, FPGA proven

WishBone compliant: No

WishBone version: n/a

License: LGPL


The graphics processed by the GPU are defined as a set of vertices that contain spatial information, i.e. vectors with coordinates [x y z] in three-dimensional Cartesian space, and additional information of color or texture coordinates.

The processing that is performed has 4 phases:

1. A group of vertices is processed as a point list, a line list, a line strip, a triangle list, a triangle strip or a triangle fan.
2. The given vertices are transformed three-dimensionally based on a 4x4 transformation matrix, being able to translate them, rotate them, scale them and/or project them.
3. Depending on whether the vertices correspond to a set of points, lines or triangles, the visible region of these figures is calculated by cutting the parts that are in front of the near view plane, and the parts that are behind the far plane of vision.
4. The information contained in the vertices is mapped in the area defined by these, at this stage it is assumed that the vertices already been projected from three-dimensional space to a space bidimencional.

The area mentioned in step 4 of processing corresponds to a section of memory that can be read and then sent to a screen for viewing.