AMBAtm Specification Compliant AHB System Generator
Details
Category: System on Chip
Created: Sep 23, 2004
Updated: Jan 27, 2020
Language: VHDL
Other project properties
Development Status: Stable
Additional info: Design done
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
The intention is to provide an easy way to configure, create and simulate a "complete" AHB system.
The main block is the "AHB matrix", in which every declared master has to be connected to one or more slaves.
In order to test the connectivity of the matrix, and to evaluate performance tradeoffs between different architectural choises a configurable arbitration scheme and a "template" model of a parametrizable master and slave are provided.
A complete testbench is also available to test the main write and read accesses made by every master to the slaves mapped on its address space.
AHB system generator is a script which builds via GUI or file all .vhd files required to
simulate the system: masters, slaves, arbiters, decoders, master and slave muxes.
To run the AHB system generator you must have installed PERL and a GUI PERL module called Tk (see for example http://www.cpan.org).
This configurator is provided by www.ipdesign.eu
Available on request:
- Slave with "retry" behaviour with internal fifo
- Slave with "split" behaviour with internal fifo
- APB slave (simple memory-like interface)
More IPs on www.ipdesign.eu:
- AHB/AHB bridge
- AHB/APB bridge
- AHB DMA
- WB/AHB bridge