User-programmable PWM, Timer and Counter Controller Core

User-programmable PWM, Timer and Counter Controller Core


Category: Uncategorized

Created: September 25, 2001

Updated: January 27, 2020

Other project properties

Development Status: Stable

WishBone compliant: Yes

WishBone version: n/a

License: n/a


PWM/Timer/Counter (PTC) IP core is a user-programmable PWM, Timer and Counter controller. Its use is to implement functions like Pulse Width Modulation (PWM), timer and counter facilities.


The following lists the main features of PTC IP core: - 32-bit counter/timer facility - single-run or continues run of PTC counter Programmable PWM mode - System clock and external clock sources for timer functionality - HI/LO Reference and Capture registers - Three-state control for PWM output driver - PWM/Timer/Counter functionalities can cause an interrupt to the CPU - WISHBONE SoC Interconnection Rev. B compliant interface More information about the WISHBONE SoC and a full specification can be found here. For further information, questions and general discussions related to the PTC core, please visit the Cores Mailing list.


- Verilog RTL and verification suite under development
- The Specification is complete: ptc_spec.pdf (see Downloads)