Efabless Announces Custom SoC Design Platform for Edge Machine Learning
The RISC-V-based SoC design platform automates workflows and promises 10x higher power efficiency than off-the-shelf solutions
Last week, Efabless released its ChipIgnite ML custom system-on-chip (SoC) development platform at Embedded World North America 2024. The platform targets custom chip development for remote sensor applications that require machine learning (ML) AI functionality.

Efabless ChipIgnite ML development board. Image used courtesy of Efabless
The ChipIgnite ML platform allows edge and Internet of Things (IoT) developers to quickly design machine learning-capable silicon for remote sensor applications. The result is an application-specific integrated circuit (ASIC) that includes RISC-V processing cores and custom digital logic. All About Circuits previously spotlighted Efabless when Weebit Nano made its Resistive RAM (ReRAM) memory technology IP available through the ChipIgnite platform. At Emebdded World North America last week, All About Circuits spoke to Efabless exes Mohamed Kassem, Co-founder and CTO, Jeff DiCorpo, Senior V.P and General Manager.
Countering the Need for Power-hungry, Expensive Hardware
Developing a conventional IoT sensor largely requires microcontroller-based hardware along with discrete logic. Some developers add field-programmable logic to the mix. While this approach can deliver all the functionality required for remote sensor implementation, it has shortcomings when an application requires complex algorithms, AI, or ML functionality. Machine learning often requires higher-powered MCUs or watt-hungry FPGA hardware, both of which increase product size and cost and reduce battery life. In some cases, the ML processing power needed makes battery operation impractical.
The Efabless ChipIgnite ML platform allows IoT sensor developers to build the same functionality into custom hard silicon. Efabless intends for the platform to be easier to use than conventional chip-design platforms so that smaller companies and teams without extensive chip-design experience can access the benefits of custom silicon.
With easier custom silicon development, advanced capabilities are in reach of far more applications than would otherwise be possible. The platform essentially allows developers to put sensor algorithms in hard silicon. These algorithms would otherwise need to be coded in microcontroller firmware, which would reduce system performance and increase power requirements. ML comes with a higher computing load than most IoT sensor microcontrollers are designed to handle. When sensor developers can easily create algorithm-processing functionality in hard silicon, end products can perform the same tasks faster with significantly less power. Efabless estimates common applications can deliver 10x longer battery life with a custom SoC over an off-the-shelf pure MCU solution.
Targeted Low-Power ML Edge Applications
“ChipIgnite ML takes the same approach as our previous SoC with a prebuilt SoC framework or chip that the customer uses as a template to customize for their part,” says DiCorpo. ”But ChipIgnite ML is a new version that is specifically optimized for this ML problem. It’s designed for building an application that has remote sensing that runs off the battery out of an edge application."
“It's bringing the power consumption from essentially milliwatts down to microwatts.”

From left to right, Efabless exes Mohamed Kassem, Co-founder and CTO, Jeff DiCorpo, Senior V.P and General Manager with All About Circuits' Jeff Child at Embedded World North America.
Kassem points out that, for Efabless, it’s all about right-sizing the ASIC technology for the application. “One of the important components we have for Efabless is that we don't necessarily say 'Let's go to the most advanced node or follow what’s next on the Moore’s law curve,' " he says. “We choose the node to the extent it matters for the application in terms of power, performance, leakage, and cost.”
Key Features of ChipIgnite ML
The Efabless platform promotes custom chips optimized for IoT and remote sensing applications. These fully customizable chips integrate analog interfaces, hardware ML acceleration, and open-source MCU IP. The platform includes an automated design flow, allowing engineers without extensive chip-design experience to turn out highly optimized ML-capable custom ASICs.
Core features of the platform include:
- 32-bit RISC-V core
- Hard silicon IP for common ML functionality
- Modular design flow for faster time to market
- Clock-gated logic and low-power states to reduce power consumption
- Customizable analog interfaces, including programmable op-amps, ADSs, DACs
- Multi-year operability on a single coin cell battery
- Support for devices small enough to fit into a key fob-sized package
Machine Learning Algorithm Support
Efabless has partnered with SensiML, a sensor ML algorithm provider, to add machine learning capabilities to customer SoC designs. SensiML develops machine-learning algorithm packs for IoT devices and applications, such as acoustic event detection, gesture recognition, anomaly detection, and more.

SensiML automated workflow. Image used courtesy of SensiML
By focusing on ML techniques, SensiML can deliver highly optimized ML code for a wide variety of IoT sensory applications. Its ML toolkit operates with a highly automated software development workflow to reduce development and test time.
Platform Availability
Efabless has reached tape out for the basic ChipIgnite ML design and will have an evaluation kit available in November 2024. The first production release is planned for late 2025. The platform includes fabrication on a multi-project wafer (MPW) shuttle, development boards, and EDA tool integration.