Lattice Debuts Low-power FPGA Family in Tiny Form Factor

December 13, 2022 by Jeff Child

In an effort to marry power efficiency with mid-range FPGA performance, the company has unveiled a new family of tiny form factor, low-power devices.

The computing industry is currently inundated with choices. When designing new platforms, today’s engineers have the choice between CPUs, GPUs, ASICs, SoCs, and more, each of which comes with its own unique strengths and weaknesses.

Amongst those alternatives, the field-programmable gate array (FPGA) is a preferred choice for a number of compute-intensive applications but generally tends to be a higher-power solution. Serving those needs, last week Lattice Semiconductor released a new FPGA platform aimed explicitly at low-power edge computing applications.

In this article, we’ll look at the benefits of FPGAs for edge computing, why FPGAs are traditionally high-power devices, and Lattice’s new platform.


Lattice FPGAs for Low-power Designs

Lattice Semiconductor’s new platform of FPGAs that are designed explicitly for low-power edge computing applications, says the company. The new family, called the Avant-E Family, is the company’s first product built on the 16 nm FinFET Avant platform. The devices are available in package sizes as small as 11 mm x 9 mm.

Avant-E block diagram.

Avant-E block diagram. Image used courtesy of Lattice Semiconductor


Thanks to the new process as well as architectural advances such as minimizing high-capacitance nets, Lattice claims that the Avant-E platform offers 2.5X lower power consumption than competitive devices while meeting a form factor that is 6x smaller as well. 

From a compute perspective, the devices offer up to 7200 INT8 multipliers, 36 Mb of embedded memory, and up to 500k logical cells. Because of this, the Avant-E platform claims up to 2x higher throughput than competitive devices while at similar or lower power numbers. Data sheets and other documentation can be downloaded from the Avant-E product page.


Why FPGAs for the Edge

When it comes to edge computing, one of the most important requirements is to achieve the highest computing power possible for the lowest power expenditure. 

In terms of raw compute performance, FPGAs are one of the best options available. An FPGA consists of thousands of logical blocks which can be judiciously interconnected based on software programming in order to create whatever functions are desired. For example, the internal fabric of an FPGA can be programmed to function as a hardware accelerator for machine learning applications.


FPGAs versus ASICs.

FPGAs versus ASICs. Image used courtesy of AnySilicon


In this way, FPGAs offer a promising solution to edge computing, allowing for application-specific hardware that accelerates computing tasks. Where many edge devices are concerned with applications like sensor fusion and machine learning inference, FPGAs are a very strong choice.

Meanwhile, the ease of programmability as compared to developing application-specific hardware means FPGAs offer shorter times to market and lower non-recurring engineering (NRE) costs for edge designers.


Why FPGAs are High Power

One place where FPGAs tend to come up short, however, is in power expenditure. A large reason why FPGAs tend to be more power-expensive devices is because of the fact that they are designed to be multi-purpose.

When an FPGA is first purchased, it is essentially a large array of logical blocks, with no explicit function or purpose. Once programmed, however, these blocks start to take on their purpose.


ASIC vs FPGA power consumption.

ASIC vs FPGA power consumption. Image used courtesy of Amara and co-authors


Since FPGAs are not designed for any specific function at the time of manufacturing, much of the hardware inside an FPGA is not fully optimized for any given application. In an ASIC the function is known, meaning designers can optimize everything from power-delivery networks to clock-delivery networks for the explicit function of the ASIC.

With an FPGA, however, the device’s ultimate function is unknown to the hardware designers. This means that FPGAs are not able to be fully optimized for any given function, and as such are unable to achieve the same power efficiency that ASICs can achieve.

In the context of edge computing, this lack of power efficiency is one of the major roadblocks to the widespread use of FPGAs.


Changing the FPGA Narrative

As we’ve discussed in this article, clearly FPGAs have faced challenges when it comes to power consumption and their suitability for edge computing. 

With its new Avant-E platform, Lattice hopes to change the narrative about the use of FPGAs in low-power applications and eventually pave the way for future edge devices based on FPGA technology.