All About Circuits

Microchip Beefs Up Its AI Data Center Technology Offerings

Taking a holistic view of data centers, Microchip is upgrading its connectivity, storage, and computer portfolios to provide comprehensive support for the AI boom.


News May 05, 2025 by Jake Hertz

Microchip recently launched a sweeping array of compute, connectivity, storage, and power solutions for AI-driven data centers. Instead of focusing on a single platform or product, the company introduced a coordinated ecosystem that addresses escalating demands for bandwidth, power efficiency, security, and management flexibility. 

 

Microchip AI data center portfolio

 

Microchip’s AI Data Center Portfolio Expansion 

Microchip’s new portfolio significantly expands its hardware infrastructure for AI workloads. For starters, the company is advancing PCIe interconnects up to Gen 5, with Gen 6 and Gen 7 already in development. Similarly, to support low-latency optical links, Microchip’s newly released META-DX2+ Ethernet PHYs implement Lambda splitting, which is an optical multiplexing technique that increases fiber throughput by up to 50% through wavelength-level channel division. According to Microchip, this new feature enables coherent optics scaling while reducing transceiver and fiber costs for data center interconnects (DCI).

For internal switching, the new LAN9646 (datasheet linked) integrates four GbE PHYs and a six-port switch fabric with support for SGMII, RGMII, MII, and RMII interfaces. It also supports industrial temperature ranges and Linux DSA compatibility.

 

Internal block diagram of the LAN9646. 

Internal block diagram of the LAN9646. 
 

Power solutions include dsPIC33A digital signal controllers (datasheet linked) that combine high clock rates with real-time power factor correction and firmware authentication. To further boost efficiency and performance, these controllers also support advanced feedback algorithms for synchronous rectification and resonant conversion.

Finally, Microchip announced new MPUs with OpenBMC support that provide secure out-of-band management for system monitoring, logging, firmware updates, and remote resets. These MPUs support Redfish for RESTful management and offer lifecycle management tools suited for cooling subsystems and chassis power shelves. The entire ecosystem is secured using Microchip’s Root of Trust controllers.

 

MCPF1412 Power Module Deep Dive 

Among these announcements, Microchip also revealed the MCPF1412 (datasheet linked), a fully integrated, point-of-load DC-DC converter. 

Operating from a 16-V input, the module delivers up to 12 A over an output range of 0.6 V to 1.8 V. Its internal powertrain integrates MOSFETs, drivers, control logic, and a high-efficiency buck topology into a 5.8 mm  x 4.9 mm x 1.6 mm LGA package. This miniaturization ultimately reduces board space by over 40% compared to discrete implementations.

 

MCPF1412 block diagram

MCPF1412 block diagram. 
 

The MCPF1412 uniquely supports both analog and digital configurability. Designers can set output voltage using resistor dividers or interface via I2C and PMBus for dynamic voltage scaling and fault management. The onboard EEPROM allows pre-programmed power-up behavior that reduces the need for host MCU intervention during system initialization. Diagnostics include over-voltage, over-current, and thermal protection, with a power-good signal for sequencing and watchdog integration.

Microchip has aligned this power module with its wider portfolio. The MCPF1412 is designed as a companion device to its FPGA, PHY, and retimer platforms. Microchip envisions the device as a strong candidate for powering PCIe retimers, FPGAs, and AI accelerators.

 

A Full Ecosystem Supporting Data Centers

Microchip’s latest hardware platform shows that, rather than delivering piecemeal components, the company is trying to coordinate hardware building blocks that serve AI workloads at every layer. As a collection of interoperable technologies, Microchip hopes its new platform-level strategy can deliver greater flexibility, trust, and operational efficiency.

 


 

All images used courtesy of Microchip.