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Osaka University Develops an FPGA Computing Device for Maximal Optimization of AI Tasks

March 13, 2020 by Luke James

Osaka University researchers have built a new device that can be customized by the user for maximum efficiency in AI applications.

The computing device, which has been built with field-programmable gate arrays (FPGAs), increases circuit density by a factor of twelve when compared with current rewireable hardware. It also reduces energy consumption by up to 80%. It is thought that these advances could lead to more flexible AI solutions that amplify performance while simultaneously cutting down energy usage.

 

The via-switch FPGA developed by Osaka University compared to the size of a conventional SRAM FPGA.

A comparison in size and integration density between the Via-Switch FPGA developed by Osaka University and a conventional SRAM FPGA. Image used courtesy of IEEE. International Solid-State Circuits Conference.

 

Why Efficiency is Needed

AI is quickly having more of a noticeable impact on our world. With the advent of 5G, the Internet of Things, and thoughts that 5G’s successor sixth-generation mobile network (6G) will almost entirely be powered by AI, there is a growing need to develop computing solutions that are able to not only keep up with the tech but adapt to different AI applications and processes, too. In doing so, research will contribute to solving one of today’s most pressing issues—the climate emergency (or, for the cynics, climate change).  

Training artificial intelligence is an intensive process that uses a whole lot of energy. Recent estimates suggest that training a single piece of artificial intelligence can use as much as 284 tonnes of carbon dioxide—the equivalent of five times the lifetime emissions of an average car. 

It’s not as if examples of AIs being trained are few and far between, either; they are everywhere. Google Translate, OpenAI’s GPT-2 text generator, ridesharing apps like Uber, spam filters, and smart-home devices like Nest and Ring all rely heavily on AI and deep learning. And although the likes of Amazon investing in wind and solar farms and Google establishing long-term agreements with suppliers of renewable energy are steps in the right direction, it is not enough. 

 

The interconnect cross-section of the Via-Switch FPGA.

The interconnected, cross-section of the Via-Switch FPGA. Image used courtesy of IEEE. International Solid-State Circuits Conference.

 

Optimising Computer Circuitry for Efficient AI Processing

So, complex algorithms require a lot of computing power. This means higher energy consumption and, consequently, bigger carbon footprints. However, if systems could be rewired to optimise computer circuitry for each given AI task, we would achieve much greater levels of energy efficiency. 

Although the lay user may think of “circuitry” as the physical transistors and logic gates found in a processor—which are fixed—FPGAs are specialized logic elements that can be rewired on the fly (or “in the field”—hence “field-programmable”) by the user for custom and dynamic applications. And this is exactly what Osaka researchers have done.

The research team used non-volatile “via-switches” that stay connected until the operator decides that they need to be reconfigured. By using a novel nanofabrication method, the team was able to pack in twelve times more elements into a grid-like “crossbar” layout, reducing the distance that electronic signals must travel and thus consuming less power—up to 80% less. 

"Our system based on field-programmable gate arrays has a very fast design cycle. It can be reprogrammed daily if desired to get the most computing power for each new AI application," Masanori Hashimoto, the research paper’s primary author, said.

By using via-switches, the research team also eliminated the need to include the programming silicon area that is necessary for other FPGA devices.