Semidynamics Unveils First Customizable RISC-V Cores for End Users
The company has emerged from stealth mode with a new paradigm in the RISC-V industry.
At its heart, the RISC-V movement centers around the idea of democratizing processor design. With an open-source instruction set architecture (ISA) and a plethora of resources available to anyone free of cost, RISC-V is meant to enable any company, regardless of resources, to design custom hardware.
Now, Spanish company Semidynamics is taking that concept one step further. This week, Semidynamics announced the launch of the so-called world’s first fully customizable RISC-V IP cores. In this article, we’ll take a look at the idea of customizability in RISC-V and Semidynamics' process-agnostic 64-bit RISC-V family of cores.
Another one of Semidynamics' chips, the Avispado test chip, preceded the release of the company's new chip, Atrevido. Image courtesy of Semidynamics
Customizability in RISC-V
When RISC-V was first created, its founders set out with the goal of making an open, accessible, and free ISA for modern computing. With these inherent features, the ISA has become extremely popular because of its ease of design and customizability.
Arithmetic operations in the RISC-V ISA. Image courtesy of ITNEXT
Unlike other ISAs, RISC-V offers a modular design that consists of alternative base parts and extensions. This gives system designers the freedom to easily use existing resources and tailor their processors to meet the requirements of unique use cases. An example of this may be the addition of specialized hardware accelerators for tasks such as machine learning. Because of the RISC-V ISA, designers can easily add these accelerators to a standard design.
Furthermore, the RISC-V ISA allows greater customizability through custom extensions. Extensions can be added to the base ISA to provide additional functionality to what already exists in the ISA.
This flexibility allows designers to create highly-optimized processors with minimal overhead, resulting in higher performance, low power efficiency, and even smaller processor size.
New RISC-V Customizability for End Users
While RISC-V offers a high degree of customizability to processor designers, this customizability isn’t necessarily passed down to the customer. When you purchase a RISC-V processor as a customer, the processor and its parameters are generally set in stone and cannot be changed.
To address this shortcoming, Semidynamics recently announced the launch of its new RISC-V IP cores, ones the company claims are fully customizable as end products. The first product in the company’s new family of customizable cores is the Atrevido core, which is a 64-bit RISC-V offering meant for data-intensive applications like machine learning and high-performance computing.
Atrevido’s two-wide, out-of-order pipeline. Image courtesy of Semidynamics
Featuring a customizable, two-wide, out-of-order pipeline architecture, Atrevido allows users to tailor the core to their liking. Specifically, the architecture is said to offer a customizable instruction cache from 8 KB to 32 KB, a data cache from 8 KB to 32 KB, and a customizable branch predictor. Additionally, the core can be customized from two-way to four-way to improve performance in certain applications.
With the new technology, Semidynamics aims to provide end users with complete control over the configuration of their processor, including instructions, address spaces, and memory-accessing capabilities. The company also hopes to build off of the modular nature of RISC-V to further optimize and improve RISC-V designs for the end user.
