ST Leverages Near-Threshold Technology in New Energy-Efficient MCUs
The new series is the first of the STM32 MCUs to use near-threshold voltage technology, bringing power efficiency and advanced security to cost-sensitive designs.
STMicroelectronics recently introduced the STM32U3 series, its latest line of ultra-low-power microcontrollers for power- and cost-constrained embedded designs.

The STM32U3. Image used courtesy of STMicroelectronics
With a slew of new features such as advanced security provisions and near-threshold voltage operation, the new family may bolster applications in industrial automation and consumer electronics alike.
The New STM32U3 Family
At the heart of the STM32U385 (datasheet linked) is a 96-MHz Arm Cortex-M33 processor, supported by a single-precision floating point unit and TrustZone technology. The microcontroller achieves a performance benchmark of 144 DMIPS and 387 CoreMark while maintaining an exceptionally low power draw, down to 9.5 μA/MHz in Run mode with an integrated SMPS converter. In low-power Stop 3 mode, for example, current consumption drops as low as 1.6 μA with partial SRAM retention.

STM32U3 block diagram. Image used courtesy of STMicroelectronics
The MCU integrates 1 MB of dual-bank flash memory with ECC and 256 KB of SRAM, which are partitioned to allow power gating of unused blocks. The memory subsystem also supports read-while-write capability for over-the-air updates. An 8-KB instruction cache allows zero-wait-state execution while an OctoSPI interface facilitates external memory expansion.
Power management features include a switchable LDO and SMPS regulator, voltage scaling, and active power domains for USB and analog subsystems. The device also embeds a full suite of analog peripherals, including two 12-bit ADCs at 2.5 Msps, a dual-channel DAC, operational amplifiers, and comparators. Additional integration includes USB 2.0 FS, SDMMC, FDCAN, I3C, SAI, and capacitive touch sensing.
Security features are one of the focal points of this family. Specifically, the STM32U385 targets PSA Certified Level 3 and SESIP Level 3 standards with hardware support that includes AES engines with side-channel attack resistance, a public key accelerator, hardware unique key storage, secure firmware installation via ST's embedded root security services, and a TrustZone-configurable memory protection unit. The microcontroller also supports secure hide protection areas and attestation capabilities to enforce firmware integrity and device authenticity.
Understanding Near-Threshold Voltage Operation
Near-threshold voltage operation refers to the practice of running digital circuits at supply voltages only slightly above the threshold voltage (Vth) of the transistors. While standard CMOS logic typically operates at voltages well above Vth to ensure high speed and noise margins, near-threshold regimes typically use supply voltages in the range of 0.4 V to 0.6 V, which is close to the 0.3 V to 0.4 V threshold of typical transistors. This reduction in voltage can yield an order-of-magnitude improvement in energy efficiency due to the quadratic relationship between dynamic power and voltage (P∝V2f).

Energy consumption by source in a 32-nm CMOS process. Image used courtesy of the University of Michigan
The primary appeal of near-threshold operation is its substantial reduction in active-mode energy consumption since lowering VDD minimizes dynamic switching energy. However, implementing NTV in practice requires addressing several technical challenges. First, transistor delay increases exponentially as VDD approaches Vth, leading to much slower logic transitions and longer critical path delays. This necessitates either accepting lower clock speeds or using architectural techniques like parallelism and pipelining to compensate. Second, variability in threshold voltage due to process, voltage, and temperature fluctuations becomes more pronounced at near-threshold levels, which can compromise timing reliability and yield.
To mitigate these issues, system designers often incorporate adaptive body biasing, dynamic voltage and frequency scaling (DVFS), and error-resilient design techniques such as Razor flip-flops or variable-latency pipelines. Additionally, software-level adaptations, like adjusting algorithm execution to low-duty cycles or leveraging hardware acceleration, can further optimize performance.
A New Option for Security-Focused Applications
By embedding near-threshold operation directly into the design and supplementing it with granular power domain control, ST hopes that the STM32U3 family will be a viable choice for applications constrained by energy budgets yet demanding in computational integrity and update flexibility. The chip is available now with volume availability through ST's distributor network and development support via the NUCLEO-U385RG-Q board.