Two New SPI Analog Mux Switches from Analog Devices
Analog Devices recently announced two new SPI-controlled analog mux switches: the ADGS1208, which has eight single channels, and the ADGS1209, which has four differential channels.
Analog Devices recently announced two new SPI-controlled analog mux switches: the ADGS1208 and the ADGS1209.
The ADGS1208 and ADGS1209 are two new analog mux SPI switches recently released by Analog Devices. The ADGS1208 IC is comprised of eight single channels while the ADGS1209 includes four differential channels (see the block diagram below).
Choose from either an eight single-channel device or a four differential-channel IC. Diagrams taken from the datasheet (PDF).
According to their shared datasheet (PDF), these devices have an operating temperature range of -40°C to 125°C, provide a rather high absolute maximum VDD to VSS voltage rating of 35V, and feature a variety of goodies, such as robust error detection features, a daisy-chain mode capability, a round robin mode, four general purpose outputs, and others.
If you find that you're not familiar with some of the terms used throughout the datasheet, then check out the Terminology section on page 21. I feel that this page could be quite handy, especially for those who might be new to electronics. I only wish more semiconductor companies provided such quick reference sheets.
According to the Theory of Operation section on page 22 of the datasheet, either SPI Mode 0 or Mode 3 can be used with these devices. Although the datasheet doesn't go into detail about what these modes are, you can find adequate information on this topic here.
Either SPI Mode 0 or Mode 3 can be used with the ADGS1208/1209 ICs. Table courtesy of Wikipedia, with additions made by the author.
Error Detection Features
SPI protocol and communications errors are detectable with these devices. As described in the Error Detection Features section on page 22 of the datasheet, the "robust error detection" is made up of three detectable errors, namely:
CRC Error Detection
The CRC, or Cyclic Redundancy Check, is an error detection feature that lengthens the SPI frame by eight clock cycles as it processes the data payload. Take note that the CRC error detection scheme is disabled by default. For additional information, check out Cyclic Redundancy Check (CRC) Error Detection also located on page 22.
SCLK Count Error Detection
SCLK count error detection permits designers to detect if an incorrect number of SCLK cycles are sent by the host microcontroller. When such an event occurs, the associated error flag gets asserted in the error flags register. Unlike CRC error detection, the SCLK count error detection is enabled by default.
Invalid Read/Write Address Error Detection
As the description implies, this error detection system detects when an invalid register address is targeted for a read or write. Moreover, this error also asserts when attempting to write to a read-only register. This error detection feature is enabled by default and can be disabled via the error configuration register.
The daisy-chain mode allows for the connection of multiple ADGS1208/09 devices. As seen in the figure below, all connected devices share the same CS and SCLK signal lines, whereas the SDO line of one device connects to the SDI line of the next device. Take note that exiting this daisy-chain mode is only possible via a hardware reset. For more information on this topic, take a look at the Daisy-Chain Mode section on page 23 of the datasheet.
An illustration of how multiple devices are connected together by use of the Daisy-Chain Mode. Diagram from the datasheet (PDF).
Round Robin Mode
The round robin mode allows users to more quickly cycle through the device's channels. As explained in the datasheet (see the Round Robin Mode section), this mode of operation is considerably faster than the normal mode (addressable mode) because it removes the 16-bit overhead required to change input channels. It's important to remember, however, that exiting this mode of operation is possible only by one of two methods: by a hardware reset or by sending two 16-bit data streams on the SPI bus. No other SPI commands are recognized in this mode of operation.
Evaluation Kits Also Available
If you're considering adding one (or both) of these digitally-controlled analog mux switches to a new design then consider getting your hands dirty with one or both of the evaluation boards. More so, Analog Devices helps out by providing a seventeen-page user guide to assist in the operation of these eval boards.
The ADGS1208 and ADGS1209 each have a dedicated evaluation board. Pictures courtesy of analog.com.
Have you had a chance to use either one of these new SPI-controlled analog mux switches, from Analog Devices, or their evaluation boards? If so, leave a comment and tell us about your experiences.