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Basic Logic Gate Troubleshooting
22 questions By Tony R. Kuphaldt
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Question 7 of 22
A technician decides to check a suspect three-input AND gate using a logic pulser. She touches the logic pulser to each input of the AND gate, while looking for a pulsing signal at the output with a logic probe.
No matter which input test point (TP1, TP2, or TP3) she pulses, though, the output test point (TP4) always reads low. Does this prove the AND gate to be defective? Explain why or why not.
Reveal answerThe AND gate may be bad, or it may be good. The test as described is inconclusive.
Follow-up question: what would have to be checked to make the described test procedure valid?
Notes:This is a very practical question, as it requires students to carefully consider what a three-input AND gate ought to do under normal conditions, and how to set up a test that is indeed valid.
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Question 8 of 22
Identify each of these logic gates by name, and complete their respective truth tables:
Reveal answer
Notes:In order to familiarize students with the standard logic gate types, I like to given them practice with identification and truth tables each day. Students need to be able to recognize these logic gate types at a glance, or else they will have difficulty analyzing circuits that use them.
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Question 9 of 22
Identify at least two faults in this simple logic gate circuit that could cause its output to fail in the “low” logic state:
Be sure to explain why the proposed faults would cause the output to fail low.
Reveal answer- Transistor Q1 failed shorted (collector to emitter)
- Transistor Q2 failed shorted (collector to emitter)
- Input line A shorted to ground
- Input line B shorted to ground
- Resistor Rpullup failed open
Follow-up question: though all of these faults would cause the output to go low, not all of them would cause the output to go low in the same way. Explain this.
Notes:Discuss your students’ answers with everyone in class, and their reasoning behind them.
