Facebook
Google
GitHub
LinkedinDigital Circuits
Basic Logic Gate Troubleshooting
22 questions By Tony R. Kuphaldt
-
Question 10 of 22
Explain why placing static-sensitive components (such as CMOS integrated circuits) into a block of conductive foam protects them against damage from ESD, and why this protection exists even if the entire block of foam (with chip) is brought to an elevated potential with respect to earth ground.
Reveal answerThe conductive foam makes the pins electrically common to one another, so no significant difference of voltage may appear between any two pins of the component.
Notes:You may underscore this principle by stating to your students that you may walk up to a piece of conductive foam with lots of CMOS chips inserted into it, and touch it with your static-charged finger, with no damage. Even if you draw a spark between your finger and the foam (or any chip pin stuck into the foam), the chips will all be protected because they experience no voltage between their pins.
-
Question 11 of 22
For a true TTL gate (not high-speed CMOS), what is the default logic state of an input line that is left floating (neither connected to VCC nor Ground)? Explain why this is.
Reveal answerFloating TTL inputs generally assume a “high” state due to the steering diode/resistor network on the input stage of each gate circuit.
Notes:The given answer does not provide enough detail to explain why TTL inputs tend to float high, so I recommend you display an internal TTL gate schematic for your students to analyze and comment on in class.
-
Question 12 of 22
What logic state does a floating CMOS gate input naturally assume? How does this compare against traditional TTL?
Reveal answerA floating CMOS gate does not assume any definite logic state! The logic state of a floating CMOS gate input is indeterminate.
Follow-up question: what state does a floating input assume for a high-speed CMOS (74HCxx) logic gate, which is designed to be an upgrade/replacement for traditional TTL gates?
Notes:Ask your students to explain their answer based on an analysis of the internals of a CMOS gate, versus the internals of a TTL gate. Memorization is not good enough - students must grasp why these different logic families behave as they do.
