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Basic Logic Gate Troubleshooting
22 questions By Tony R. Kuphaldt
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Question 13 of 22
As an electronics instructor, I have the opportunity to see a lot of creative mistakes made by students as they learn to build circuits. One very common mistake made in CMOS circuit construction manifests itself in erratic behavior: the circuit may function correctly for a time, but suddenly and randomly it stops. Then, just by waving your hand next to the circuit, it begins to work again!
This problem is especially prevalent on days where the atmospheric humidity is low, and static electric charges easily accumulate on objects and people. Explain what sort of CMOS wiring mistake would cause a powered logic gate to behave erratically due to nearby static electric fields, and what the proper solution is to this problem.
Reveal answerThis classic problem is caused by a lack of pull up or pulldown resistors on CMOS gate inputs.
Notes:Students think I’m a wizard by being able to troubleshoot their CMOS circuits just by waving my hand next to them. No, I’m just wise in the ways of common student error!
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Question 14 of 22
Explain why the allowable power supply voltage range for a true TTL (not high-speed CMOS) logic gate is so narrow. What is the typical range of supply voltages for a true TTL gate, and why can’t this type of logic gate operate from a wider range of voltages as CMOS gates can?
Reveal answerDue to the biasing requirements of its constituent bipolar transistors, TTL circuitry requires a much closer-regulated power supply voltage than CMOS. I’ll let you research what this typical range is!
Notes:Many of the old 74xx and 74LSxx logic circuits are considered obsolete, but may still be found in a lot of operating equipment! It is not uncommon to have students mistakenly research the datasheets of a newer logic family such as 74HCxx which has different power supply requirements than traditional TTL. Be prepared to elaborate on the difference(s) between these IC families if and when your students encounter this confusion!
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Question 15 of 22
Logic probes are useful tools for troubleshooting digital logic gate circuits, but they certainly have limitations. For instance, in this simple circuit, a logic probe will give correct “high” and “low” readings at test point 1 (TP1), but it will always read “low” (even when the LED is on) at test point 2 (TP2):
Now, obviously the output of the gate is “high” when the LED is on, otherwise it would not receive enough voltage to illuminate. Why then does a logic probe fail to indicate a high logic state at TP2?
Reveal answerI won’t give away the answer here, but it has something to do with proper CMOS logic level voltages.
Follow-up question: this LED circuit is rather simple, and the scenario almost silly, because the LED’s presence makes checking the logic state at TP1 and TP2 superfluous! Can you think of any other circuit or situation where a similar false reading may be displayed by a logic probe - where the logic state has not been made visually obvious by the presence of an LED?
Notes:It is easy for students to overlook the limitations of a logic probe, and to forget what actually drives it to say “high” or “low” when measuring a logic level. This is why in low-speed circuits I prefer to use a good digital voltmeter rather than a logic probe to discern logic states. With a voltmeter, you can see exactly what the voltage level is, and determine whether or not the logic state is marginal.
