The processor market has been around for decades and in that time, man has traveled to the moon eleven times, the Information Age arrived with the launch of the world wide web, and subsequently Amazon, Facebook and Google have become household names. And yet since then, processor development and design have remained largely unchanged. That is until just a few years ago when an instruction set architecture (ISA) born out of UC Berkeley was developed.

Created with the aim to revolutionize and democratize processor design for everything from mobile phones to industrial device controllers, RISC-V is changing the world of processor design. But what makes RISC-V so special? And is it all hype or meaningful hope for the market? Two words: open source.

RISC-V’s open standard ISA has grown to be highly impactful in the processor design space due to its open specification. Opening up the ISA means it can be explored and further developed by industry experts, commercial innovators and top academics.

But the open source nature of RISC-V allows for something else incredibly important that has been lacking in the processor market for a long time: diversity. Rather than choosing an off-the-shelf processor, RISC-V enables a high degree of customization, previously unavailable to product designers. The ability to add extensions to the base ISA makes it an attractive option for applications requiring special configurations.

Today, any vendor can design a processor using RISC-V’s ISA, which invites more competition into the processor space. This competition gives product designers the ability to choose between vendors and the freedom to switch down the road – they are no longer beholden to software tools that are exclusive to a single vendor. This revolution brings a level of vendor mobility to the industry that was never possible before.

 

RISC-V Finds Validation

Endorsed by Google, Nvidia, and Oracle, RISC-V is gaining attention from industry giants.

 

risc-v member ecosystem

Figure 1. Current list of RISC-V members

 

Early innovator SiFive, a processor firm founded by some of the RISC-V inventors, announced the release of its 64-bit quadcore U54-MC core IP last year. This is a milestone for the ISA because it is the first RISC-V processor capable of running a wide range of operating systems, including Linux. In a press release from SiFive, co-founder Andrew Waterman stated the launch of the IP, “takes the industry one step closer to making custom silicon available to everyone.” Custom and silicon were two words that were previously never seen together.

Non-corporate entities are also embracing RISC-V. The Indian government plans to spend $45 million on the development of a 64-bit processor based on the RISC-V architecture. Additionally, the Israel Innovation Authority started a program called Genpro that focuses on building a processing platform around RISC-V.

As time goes on, more and more major players are jumping on the RISC-V platform. One of the most eye-raising announcements came from Western Digital late last year when they announced the company would be transitioning their processors to RISC-V. That’s over one BILLION cores shipped per year and the company expects to double that number in short order. Such announcements underscore the commercial viability of RISC-V. In a statement by Western Digital, CTO Martin Fink commented, “RISC-V open architecture engenders incredible amounts of innovation.” Fink cited the firm’s desire to use the architecture to drive product innovation, as the company explores new ways to harness the power of data.

 

Securing RISC-V: The Next Frontier

Opportunities abound for RISC-V, but the next development frontier lies in creating secure computing solutions. In the wake of Spectre and Meltdown, the industry began to critically examine how processor design plays a role in overall system security. Given an estimated 30 billion connected devices in play around the word, IoT security is not a luxury but rather a necessity.

 

global connected IoT devices forecast

Figure 2. Past and projected IoT-connected devices. With such a large number of connected devices, security is imperative.

 

RISC-V has the potential to impact our existing cybercrime epidemic by providing an opportunity to “fix” a core without ever actually changing it.  

For example, the open source nature of RISC-V allows a wide audience to examine the architecture for flaws and correct them before they become industry-wide security incidents. This community enforces a strong practice of peer review, ensuring any holes in the architecture are quickly patched. This process is contrasted with that of a proprietary ISA in which a comparatively smaller team of engineers is tasked with finding and patching every bug. And in case you are keeping score, to date, no announced RISC-V silicon is susceptible to either Spectre or Meltdown — including the popular Rocket processor.

As the IoT market grows, RISC-V is a prime candidate for adoption due to its customizable architecture. More than hype and hyperbole, RISC-V has emerged as a processor technology offering a clean slate, new design opportunities, and the level of performance and extensibility required in today’s hyperconnected world.  

 


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